-
公开(公告)号：US20120194370A1
公开(公告)日：2012-08-02
申请号：US13305607
申请日：2011-11-28
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/00
摘要： A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.
摘要翻译： Σ-Δ转换器可以包括耦合到第一求和电路和第二求和电路的滤波器。 多位量化器可以耦合到第二求和电路。 可以包括定义多位量化器和第一求和电路之间的反馈路径的单位数模转换器（DAC）。 可以包括限定第一求和电路和第二求和电路之间的前馈路径的前馈系数电路。
-
公开(公告)号：US08779956B2
公开(公告)日：2014-07-15
申请号：US13305607
申请日：2011-11-28
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
摘要： A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.
摘要翻译： Σ-Δ转换器可以包括耦合到第一求和电路和第二求和电路的滤波器。 多位量化器可以耦合到第二求和电路。 可以包括定义多位量化器和第一求和电路之间的反馈路径的单位数模转换器（DAC）。 可以包括限定第一求和电路和第二求和电路之间的前馈路径的前馈系数电路。
-
公开(公告)号：US20100321221A1
公开(公告)日：2010-12-23
申请号：US12870135
申请日：2010-08-27
申请人： Giri NK. Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK. Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/04
摘要： A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.
摘要翻译： Σ-Δ转换器系统和方法包括耦合到转换器的输出端的多位量化器电路。 单个位模数转换器电路包含在转换器的反馈路径中。 该转换器包括前馈路径，其可操作以将输入电压乘以具有作为增益控制输入信号的函数的值的前馈系数。 增益控制输入信号可以具有作为多位量化器的输出的函数的值。
-
公开(公告)号：US20080150777A1
公开(公告)日：2008-06-26
申请号：US11999256
申请日：2007-12-03
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/00
摘要： A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.
摘要翻译： Σ-Δ转换器系统和方法包括耦合到转换器的输出端的多位量化器电路。 单个位模数转换器电路包含在转换器的反馈路径中。 该转换器包括前馈路径，其可操作以将输入电压乘以具有作为增益控制输入信号的函数的值的前馈系数。 增益控制输入信号可以具有作为多位量化器的输出的函数的值。
-
公开(公告)号：US20110187570A1
公开(公告)日：2011-08-04
申请号：US13081918
申请日：2011-04-07
申请人： Giri NK Rangan , Roger Levinson , John M. Caruso
发明人： Giri NK Rangan , Roger Levinson , John M. Caruso
IPC分类号： H03M3/02
摘要： A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.
摘要翻译： Σ-Δ转换器系统和方法包括耦合到转换器的输出端的多位量化器电路。 单个位模数转换器电路包含在转换器的反馈路径中。 该转换器包括前馈路径，其可操作以将输入电压乘以具有作为增益控制输入信号的函数的值的前馈系数。 增益控制输入信号可以具有作为多位量化器的输出的函数的值。
-
公开(公告)号：US07786912B2
公开(公告)日：2010-08-31
申请号：US11999256
申请日：2007-12-03
申请人： Giri N K Rangan , Roger Levinson , John M Caruso
发明人： Giri N K Rangan , Roger Levinson , John M Caruso
IPC分类号： H03M3/00
摘要： A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer.
摘要翻译： Σ-Δ转换器系统和方法包括耦合到转换器的输出端的多位量化器电路。 单个位模数转换器电路包含在转换器的反馈路径中。 该转换器包括前馈路径，其可操作以将输入电压乘以具有作为增益控制输入信号的函数的值的前馈系数。 增益控制输入信号可以具有作为多位量化器的输出的函数的值。
-
公开(公告)号：US5852360A
公开(公告)日：1998-12-22
申请号：US844166
申请日：1997-04-18
申请人： Roger Levinson
发明人： Roger Levinson
CPC分类号： G05F3/245
摘要： A reference voltage generating method and circuit is disclosed where the output can be programmably calibrated for minimum temperature drift. Output calibration is performed by adjusting a value of resistance of a resistor in a band-gap circuit. Digitally programmable switches are used to incrementally reduce or increase the value of the target resistor. The control circuit according to the present invention is also designed such that it tracks variations in process and temperature.
摘要翻译： 公开了一种参考电压产生方法和电路，其中可编程校准输出以实现最小温度漂移。 通过调整带隙电路中的电阻的电阻值来进行输出校准。 数字可编程开关用于递增地减小或增加目标电阻的值。 根据本发明的控制电路也被设计成使其跟踪过程和温度的变化。
-
公开(公告)号：US06836228B1
公开(公告)日：2004-12-28
申请号：US10301129
申请日：2002-11-20
申请人： Roger Levinson , Phillip J. Benzel
发明人： Roger Levinson , Phillip J. Benzel
IPC分类号： H03M100
摘要： Methods and apparatus for converting analog signals to digital signals using a switched integrator. A method includes receiving the analog signal at a summing junction, receiving a clock signal transitioning between a first level and a second level, connecting an output of the summing junction to an integrator when the clock signal is at the first level, and disconnecting the output of the summing junction from the integrator when the clock signal is at the second level. An output signal is provided, and is determined by the polarity of an output of the integrator when the clock signal transitions from the first level to the second level. The output signal is delayed, and received with a digital-to-analog converter; which provides an output to the summing junction.
摘要翻译： 使用开关积分器将模拟信号转换为数字信号的方法和装置。 一种方法包括在加法结处接收模拟信号，接收在第一电平和第二电平之间转换的时钟信号，当时钟信号处于第一电平时将求和结点的输出连接到积分器，以及断开输出 当时钟信号处于第二电平时，来自积分器的求和结点。 提供输出信号，并且当时钟信号从第一电平转变到第二电平时由积分器的输出的极性确定。 输出信号被延迟，并用数/模转换器接收; 其向求和结点提供输出。
-
公开(公告)号：US5880623A
公开(公告)日：1999-03-09
申请号：US808822
申请日：1997-02-28
申请人： Roger Levinson
发明人： Roger Levinson
CPC分类号： G05F3/247
摘要： Method and circuitry for power control in integrated circuits using field effect transistor (FET) technology are disclosed. According to the present invention, for each circuit block that is biased by the power supply voltage a dedicated level shifter is inserted between the block and the power supply. In one embodiment, a switch is also coupled in parallel to the level shifter. The switch is closed when a low external power supply voltage is applied, and opened when a higher power supply voltage is applied. A second embodiment removes the switch and adds a bias generator that supplies a bias voltage to each level shifter.
摘要翻译： 公开了使用场效应晶体管（FET）技术的集成电路中功率控制的方法和电路。 根据本发明，对于由电源电压偏置的每个电路块，在块和电源之间插入专用电平移位器。 在一个实施例中，开关也与电平移位器并联耦合。 当施加低的外部电源电压时，开关闭合，并且当施加更高的电源电压时打开。 第二实施例去除开关并增加向每个电平移位器提供偏置电压的偏置发生器。
-
公开(公告)号：US20070279408A1
公开(公告)日：2007-12-06
申请号：US11446488
申请日：2006-06-01
申请人： Dong Zheng , Paul Ta , Roger Levinson
发明人： Dong Zheng , Paul Ta , Roger Levinson
CPC分类号： G09G5/006 , G09G2370/047 , H04N7/108 , H04N21/2365 , H04N21/4305 , H04N21/4347
摘要： Multiple data streams are distributed using conventional data cables and multiplexing circuits by taking advantage of a technique that allows reliable high speed transmission of digital data. In one example, a number of parallel data streams (e.g., video data streams) are serialized to allow them to be economically and reliably transmitted over conventional data cables (e.g., category 5 or category 6 twisted pair cables, and automotive data transmission cables) over long distance. The parallel data streams are recovered by deserializing from the transmitted signal using a data recovery technique that recovers a clocking signal from the transmitted signal. In another example, multiple data streams from multiple asynchronous sources are multiplexed to provide an input data stream to a display device. The multiple data stream may be provided through, for example, conventional connection cables (e.g., DVI, LEONI, CATS or CAT6 cables).
摘要翻译： 通过利用允许数字数据的可靠高速传输的技术，使用传统的数据电缆和多路复用电路来分配多个数据流。 在一个示例中，将多个并行数据流（例如，视频数据流）串行化以允许它们通过常规数据电缆（例如，类别5或类别6双绞线电缆和汽车数据传输电缆）经济地和可靠地传输， 远距离。 并行数据流通过使用从发送信号中恢复时钟信号的数据恢复技术从发送信号反序列化而被恢复。 在另一示例中，来自多个异步源的多个数据流被多路复用以向显示设备提供输入数据流。 多数据流可以通过例如常规连接电缆（例如，DVI，LEONI，CATS或CAT6电缆）来提供。
-
-
-
-
-
-
-
-
-
搜索结果
12 条记录 (耗时 0.02 秒)
