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    Extended drain field effect transistor with trench gate(s) and method
    1.
    发明授权
    Extended drain field effect transistor with trench gate(s) and method 有权

    公开(公告)号：US11855139B2

    公开(公告)日：2023-12-26

    申请号：US17571611

    申请日：2022-01-10

    Applicant: GlobalFoundries U.S. Inc.

    Inventor： Ketankumar Harishbhai Tailor

    IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423

    CPC classification number: H01L29/0653 ,  H01L29/4236 ,  H01L29/66704 ,  H01L29/7825 ,  H01L29/7835

    Abstract: Disclosed are a semiconductor structure and method of forming the structure. The semiconductor structure includes an extended drain metal oxide semiconductor field effect transistor (EDMOSFET). The EDMOSFET includes, in the semiconductor layer, a body well, which has a source region therein, and a drain drift well, which abuts the body well and has a drain region therein. A trench gate structure is within the drain drift well positioned laterally between the body-drain drift junction and an internal shallow trench isolation (STI) region and the internal STI region is between the trench gate structure and the drain region. A primary gate structure is on the top surface of the semiconductor layer traversing the body-drain drift junction and optionally extending over the trench gate structure. Gate dielectric material physically separates gate conductor materials of the primary and trench gate structures. Optionally, the EDMOSFET includes more than one trench gate structure.

    EXTENDED DRAIN FIELD EFFECT TRANSISTOR WITH TRENCH GATE(S) AND METHOD
    8.
    发明公开
    EXTENDED DRAIN FIELD EFFECT TRANSISTOR WITH TRENCH GATE(S) AND METHOD 审中-公开

    公开(公告)号：US20230223437A1

    公开(公告)日：2023-07-13

    申请号：US17571611

    申请日：2022-01-10

    Applicant: GlobalFoundries U.S. Inc.

    Inventor： Ketankumar Harishbhai Tailor

    IPC: H01L29/06 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66

    CPC classification number: H01L29/0653 ,  H01L29/7825 ,  H01L29/7835 ,  H01L29/4236 ,  H01L29/66704

    Abstract: Disclosed are a semiconductor structure and method of forming the structure. The semiconductor structure includes an extended drain metal oxide semiconductor field effect transistor (EDMOSFET). The EDMOSFET includes, in the semiconductor layer, a body well, which has a source region therein, and a drain drift well, which abuts the body well and has a drain region therein. A trench gate structure is within the drain drift well positioned laterally between the body-drain drift junction and an internal shallow trench isolation (STI) region and the internal STI region is between the trench gate structure and the drain region. A primary gate structure is on the top surface of the semiconductor layer traversing the body-drain drift junction and optionally extending over the trench gate structure. Gate dielectric material physically separates gate conductor materials of the primary and trench gate structures. Optionally, the EDMOSFET includes more than one trench gate structure.

    INTEGRATED CIRCUIT STRUCTURE WITH METAL GATE AND METAL FIELD PLATE HAVING COPLANAR UPPER SURFACES
    10.
    发明申请
    INTEGRATED CIRCUIT STRUCTURE WITH METAL GATE AND METAL FIELD PLATE HAVING COPLANAR UPPER SURFACES 有权

    公开(公告)号：US20220302306A1

    公开(公告)日：2022-09-22

    申请号：US17206195

    申请日：2021-03-19

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Ketankumar Harishbhai Tailor ,  Peter Baars

    IPC: H01L29/78 ,  H01L29/40 ,  H01L29/66

    Abstract: An integrated circuit (IC) structure and a field plate are disclosed. The IC structure and field plate may find advantageous application with, for example, extended drain metal-oxide semiconductor (EDMOS) transistors. The IC structure includes a transistor including a metal gate structure and a drain extension region extending laterally from partially under the metal gate structure to a drain region. A metal field plate is over the drain extension region. Due to being formed simultaneously as part of a gate-last formation approach, the metal field plate has an upper surface coplanar with an upper surface of the metal gate structure. A field plate contact may be on the metal field plate.

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