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    Network processing system, core language processor and method of executing a sequence of instructions in a stored program
    1.
    发明申请
    Network processing system, core language processor and method of executing a sequence of instructions in a stored program 审中-公开
    网络处理系统，核心语言处理器和在存储的程序中执行指令序列的方法

    公开(公告)号：US20050033938A1

    公开(公告)日：2005-02-10

    申请号：US10940434

    申请日：2004-09-14

    申请人： Gordon Davis ,  Marco Heddes ,  Ross Leavens ,  Mark Rinaldi

    发明人： Gordon Davis ,  Marco Heddes ,  Ross Leavens ,  Mark Rinaldi

    IPC分类号： G06F9/30 ,  G06F9/38 ,  G06F15/00

    CPC分类号： G06F9/3013 ,  G06F9/30087 ,  G06F9/3885

    摘要： A network processor utilizes protocol processor units (PPUs) to provide instruction communication for the network. Each PPU includes a core language processor (CLP). Each CLP contains general purpose registers and includes a coprocessor that contains scalar registers and array registers. The CLP controls and instructs a plurality of coprocessors that run in parallel with the CLP. Each coprocessor is a specialized hardware assist engine having direct access to the CLP registers and arrays through two sets of interface signals, a coprocessor execution interface and a coprocessor data interface.

    摘要翻译： 网络处理器利用协议处理器单元（PPU）为网络提供指令通信。 每个PPU包括核心语言处理器（CLP）。 每个CLP都包含通用寄存器，包括一个包含标量寄存器和数组寄存器的协处理器。 CLP控制并指示与CLP并行运行的多个协处理器。 每个协处理器是专门的硬件辅助引擎，可以通过两组接口信号，协处理器执行接口和协处理器数据接口直接访问CLP寄存器和阵列。

    Controller for multiple instruction thread processors
    2.
    发明申请
    Controller for multiple instruction thread processors 失效
    多指令线程处理器的控制器

    公开(公告)号：US20050022196A1

    公开(公告)日：2005-01-27

    申请号：US10915983

    申请日：2004-08-11

    申请人： Gordon Davis ,  Marco Heddes ,  Ross Leavens ,  Fabrice Verplanken

    发明人： Gordon Davis ,  Marco Heddes ,  Ross Leavens ,  Fabrice Verplanken

    IPC分类号： G06F9/46 ,  G06F9/38 ,  G06F9/48 ,  G06F9/52 ,  G06F15/16

    CPC分类号： G06F9/3802 ,  G06F9/3851

    摘要： A mechanism controls a multi-thread processor so that when a first thread encounters a latency event for a first predefined time interval temporary control is transferred to an alternate execution thread for duration of the first predefined time interval and then back to the original thread. The mechanism grants full control to the alternate execution thread when a latency event for a second predefined time interval is encountered. The first predefined time interval is termed short latency event whereas the second time interval is termed long latency event.

    摘要翻译： 机制控制多线程处理器，使得当第一线程遇到第一预定义时间间隔的等待时间事件时，临时控制在第一预定义时间间隔的持续时间内被传送到备用执行线程，然后返回到原始线程。 当遇到第二个预定义时间间隔的延迟事件时，机制将授权对备用执行线程的完全控制。 第一预定时间间隔称为短延迟事件，而第二时间间隔称为长延迟事件。

    Method and system for compressing multi-field rule specifications
    3.
    发明申请
    Method and system for compressing multi-field rule specifications 失效
    压缩多场规则规范的方法和系统

    公开(公告)号：US20050237938A1

    公开(公告)日：2005-10-27

    申请号：US10832957

    申请日：2004-04-27

    申请人： Everett Corl ,  Gordon Davis ,  Marco Heddes ,  Piyush Patel ,  Ravinder Sabhikhi

    发明人： Everett Corl ,  Gordon Davis ,  Marco Heddes ,  Piyush Patel ,  Ravinder Sabhikhi

    IPC分类号： G01R31/08 ,  G06F11/00 ,  G06F15/18 ,  G06F17/00 ,  G06N5/02 ,  G08C15/00 ,  H04J1/16 ,  H04J3/14 ,  H04L1/00 ,  H04L12/26

    CPC分类号： G06N99/005

    摘要： The present invention relates to a method and system for storing a plurality of multi-field classification rules in a computer system. Each multi-field classification rule includes a rule specification that itself includes a plurality of fields and a plurality of field definitions corresponding to the fields. The method of the present invention includes providing a virtual rule table, where the table stores a plurality of field definitions, and for each of the plurality of multi-field classification rules, compressing the rule specification by replacing at least one field definition with an associated index into the virtual rule table. The method also includes storing each of the compressed rule specifications and the virtual rule table in a shared segment of memory.

    摘要翻译： 本发明涉及一种用于在计算机系统中存储多个多场分类规则的方法和系统。 每个多字段分类规则包括本身包括多个字段的规则规范和对应于字段的多个字段定义。 本发明的方法包括提供虚拟规则表，其中表存储多个字段定义，并且对于多个多字段分类规则中的每一个，通过用相关联的替换来替换至少一个字段定义来压缩规则规范 索引到虚拟规则表。 该方法还包括将每个压缩规则规范和虚拟规则表存储在存储器的共享段中。

    Data structure supporting random delete and aging/timer function
    6.
    发明申请
    Data structure supporting random delete and aging/timer function 失效
    数据结构支持随机删除和老化/定时器功能

    公开(公告)号：US20050050188A1

    公开(公告)日：2005-03-03

    申请号：US10654139

    申请日：2003-09-03

    申请人： Gordon Davis ,  Marco Heddes ,  Dongming Hwang

    发明人： Gordon Davis ,  Marco Heddes ,  Dongming Hwang

    IPC分类号： G06F15/173 ,  G06F17/30

    CPC分类号： G06F17/30955 ,  Y10S707/99933 ,  Y10S707/99942

    摘要： A procedure is used to provide data structures that handle large numbers of active data entries and a high rate of additions and deletions of active entries. The procedure utilizes one or more of the following modifications. Timers are removed from individual session table entries and are linked via pointers. Bilateral links are established between the session table and the timer structure. Aging/timer checks are applied to the timer control block (TCB). A chain of TCBs, optionally including an excess of blocks, may be used along with packing of multiple TCBs into a single memory location. This excess of blocks permits a terminated session to continue to occupy a TCB until the timer process progresses to that block location in the chain of blocks.

    摘要翻译： 一个过程用于提供处理大量活动数据条目的数据结构以及高活动条目的添加和删除率。 该过程利用以下一个或多个修改。 定时器从单个会话表条目中删除，并通过指针进行链接。 在会话表和定时器结构之间建立双向链路。 老化/定时器检查应用于定时器控制块（TCB）。 可以使用可选地包括多余块的TCB链，以及将多个TCB打包到单个存储器位置中。 这个多余的块允许终止的会话继续占用TCB，直到定时器进程前进到块链中的块位置。

    Method and system for managing multi-field classification rules relating to ingress contexts and egress contexts
    7.
    发明申请
    Method and system for managing multi-field classification rules relating to ingress contexts and egress contexts 失效
    用于管理与入口上下文和出口上下文相关的多字段分类规则的方法和系统

    公开(公告)号：US20050237939A1

    公开(公告)日：2005-10-27

    申请号：US10832958

    申请日：2004-04-27

    申请人： Everett Corl ,  Gordon Davis ,  Marco Heddes ,  Piyush Patel ,  Ravinder Sabhikhi

    发明人： Everett Corl ,  Gordon Davis ,  Marco Heddes ,  Piyush Patel ,  Ravinder Sabhikhi

    IPC分类号： G06F15/00 ,  G06F15/18 ,  G06F17/00 ,  G06N5/02 ,  G06N99/00 ,  H04J3/14 ,  H04L12/26 ,  G06N1/00

    CPC分类号： G06N99/005

    摘要： The present invention relates to a method and system for managing a plurality of multi-field classification rules. The method includes providing a first table that includes a plurality of entries corresponding to a plurality of rules relating to an ingress context and providing a second table that includes a plurality of entries corresponding to a plurality of rules relating to an egress context. The method also includes utilizing the first table and the second table to identify any rules relating to the ingress context and any rules relating to the egress context that match a search key.

    摘要翻译： 本发明涉及一种用于管理多个多场分类规则的方法和系统。 该方法包括提供第一表格，该第一表格包括对应于与入口上下文有关的多个规则的多个条目，并提供第二表格，该第二表格包括对应于与出口上下文有关的多个规则的多个条目。 该方法还包括利用第一表和第二表来识别与入口上下文有关的任何规则以及与搜索关键字匹配的出口上下文相关的任何规则。

    NETWORK PROCESSOR WITH SINGLE INTERFACE SUPPORTING TREE SEARCH ENGINE AND CAM
    8.
    发明申请
    NETWORK PROCESSOR WITH SINGLE INTERFACE SUPPORTING TREE SEARCH ENGINE AND CAM 失效
    网络处理器，具有单接口支持树搜索引擎和CAM

    公开(公告)号：US20060265363A1

    公开(公告)日：2006-11-23

    申请号：US11457952

    申请日：2006-07-17

    申请人： Jean Calvignac ,  Gordon Davis ,  Marco Heddes ,  Michael Siegel

    发明人： Jean Calvignac ,  Gordon Davis ,  Marco Heddes ,  Michael Siegel

    IPC分类号： G06F17/30

    CPC分类号： H04L49/3009 ,  G11C15/00 ,  H04L45/745 ,  H04L45/7453 ,  H04L49/90

    摘要： A method and system for identifying a data structure associated with a packet of data. A processor internal to a packet processor may extract one or more fields in a packet header field of a received packet of data to generate a search key. The internal processor may then be configured to select which table, e.g., routing table, quality of service table, filter table, needs to be accessed using the search key in order to process the received packet of data. A determination may then be made by the internal processor as to whether a CAM or a hash table and a Patricia Tree are used to identify the data structure associated with the received packet of data. Based on table definitions in a register, the internal processor may make such a determination.

    摘要翻译： 一种用于识别与数据包相关联的数据结构的方法和系统。 分组处理器内部的处理器可以提取接收到的数据分组的分组报头字段中的一个或多个字段以生成搜索关键字。 然后可以将内部处理器配置为选择哪个表，例如路由表，服务质量表，过滤表，需要使用搜索关键字进行访问，以便处理接收的数据分组。 然后内部处理器可以确定CAM或散列表和Patricia Tree是否用于标识与所接收的数据分组相关联的数据结构。 根据寄存器中的表定义，内部处理器可以作出这样的确定。

    Data structure supporting session timer and variable aging function including self adjustable 2MSL
    9.
    发明申请
    Data structure supporting session timer and variable aging function including self adjustable 2MSL 审中-公开
    数据结构支持会话定时器和可变老化功能，包括自调节2MSL

    公开(公告)号：US20050050018A1

    公开(公告)日：2005-03-03

    申请号：US10654502

    申请日：2003-09-03

    申请人： Claude Basso ,  Gordon Davis ,  Marco Heddes ,  Dongming Hwang ,  Colin Verrilli

    发明人： Claude Basso ,  Gordon Davis ,  Marco Heddes ,  Dongming Hwang ,  Colin Verrilli

    IPC分类号： G06F17/30

    CPC分类号： G06F16/20

    摘要： Dynamic data search structures are described that are capable of handling large numbers of active entries and a high rate of additions and deletions of active entries while complying with 2MSL requirements and providing precise time-out capabilities. A free queue which is integrated with the timing loop of session entries provides available sessions for new entries in the search structure and removes obsolete sessions from the tree. Multiples of such timing loops can be used to maintain multiple timing intervals. One such timing loop may contain soft entries still attached to the search structure but which are eligible to be removed and to be reused to accommodate new sessions. A spare buffer pool is also included in the data structure to add and remove buffers to maintain delays.

    摘要翻译： 描述了能够处理大量活动条目的动态数据搜索结构，以及符合2MSL要求并提供精确超时能力的活动条目的增加和删除的高速率。 与会话条目的定时循环集成的空闲队列为搜索结构中的新条目提供可用会话，并从树中删除过时的会话。 这种定时循环的倍数可用于维持多个定时间隔。 一个这样的定时循环可以包含仍然附着到搜索结构但是有资格被移除并被重新使用以容纳新会话的软条目。 数据结构中还包括备用缓冲池，以添加和删除缓冲区以维持延迟。

    LOOKUPS BY COLLISIONLESS DIRECT TABLES AND CAMS
    10.
    发明申请
    LOOKUPS BY COLLISIONLESS DIRECT TABLES AND CAMS 有权
    无连续直接表和CAMS的查询

    公开(公告)号：US20080098015A1

    公开(公告)日：2008-04-24

    申请号：US11962558

    申请日：2007-12-21

    申请人： Gordon Davis ,  Andreas Herkersdorf ,  Clark Jeffries ,  Mark Rinaldi

    发明人： Gordon Davis ,  Andreas Herkersdorf ,  Clark Jeffries ,  Mark Rinaldi

    IPC分类号： G06F17/30

    CPC分类号： H04L49/3009 ,  H04L45/745 ,  H04L45/7453 ,  H04L49/351

    摘要： A structure and technique for preventing collisions using a hash table in conjunction with a CAM to identify and prevent collisions of binary keys. A portion of the hash value of a binary key, which does not collide with a portion of the hash value of any other reference binary key, is used as an entry in the hash table. If two or more binary keys have identical values of the portions of the hash values, each of these binary keys are stored in their entirety, in the CAM. The key in the CAM provides a pointer to a data structure where the action associated with that binary key is stored. If the binary key is not found in the CAM, the binary key is hashed, and a specific entry in the hash table is selected using a portion of this hash value.

    摘要翻译： 一种用于使用散列表与CAM结合来防止冲突的结构和技术，以识别和防止二进制键的冲突。 不与任何其他参考二进制密钥的散列值的一部分相冲突的二进制密钥的散列值的一部分被用作散列表中的条目。 如果两个或更多个二进制密钥具有相同的哈希值部分的值，则这些二进制密钥中的每一个都将全部存储在CAM中。 CAM中的关键字提供了指向数据结构的指针，其中存储与该二进制密钥相关联的动作。 如果在CAM中没有找到二进制密钥，则二进制密钥被散列，并且使用该哈希值的一部分来选择散列表中的特定条目。