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    Transistor apparatus
    5.
    发明申请
    Transistor apparatus 有权
    晶体管装置

    公开(公告)号：US20070246800A1

    公开(公告)日：2007-10-25

    申请号：US11408775

    申请日：2006-04-21

    申请人： Leland Swanson ,  Gregory Howard

    发明人： Leland Swanson ,  Gregory Howard

    IPC分类号： H01L27/12

    CPC分类号： H01L29/7322 ,  H01L29/0821

    摘要： A transistor apparatus includes a silicon substrate and a barrier structure extending substantially from generally adjacent the silicon substrate to a locus displaced from the silicon substrate. The barrier structure generally surrounds a volume containing connection loci for the transistor apparatus and a buried layer in a silicon medium. The connection loci and the buried layer occupy a space generally presenting a first lateral expanse generally parallel with the silicon substrate. The volume presents a second lateral expanse generally parallel with the silicon substrate. The second lateral expanse is greater than the first lateral expanse within a predetermined distance of the substrate.

    摘要翻译： 晶体管装置包括硅衬底和基本上从硅衬底基本上相邻延伸到从硅衬底移位的轨迹的阻挡结构。 阻挡结构通常围绕用于晶体管装置的连接轨迹和硅介质中的掩埋层的体积。 连接轨迹和埋层占据通常呈现与硅衬底大致平行的第一横向宽度的空间。 体积呈现与硅衬底大致平行的第二横向宽度。 第二横向宽度大于在衬底的预定距离内的第一横向宽度。

    Systems and methods of priority failover determination
    6.
    发明申请
    Systems and methods of priority failover determination 有权
    确定优先级故障切换的系统和方法

    公开(公告)号：US20060209677A1

    公开(公告)日：2006-09-21

    申请号：US11084600

    申请日：2005-03-18

    申请人： Michael McGee ,  Mark Enstone ,  Gregory Howard

    发明人： Michael McGee ,  Mark Enstone ,  Gregory Howard

    IPC分类号： H04L1/00

    CPC分类号： H04L41/0609 ,  H04L12/44

    摘要： Systems and methods for implementing priority failover determination are disclosed. An exemplary method includes prioritizing ranking criteria for a plurality of network adapter ports based at least in part on user input. The method also includes determining a ranking value for each of the plurality of network adapter ports based on the prioritized ranking criteria. The method further includes designating a primary network adapter port and at least a secondary network adapter port based on the ranking value for each of the plurality of network adapter ports

    摘要翻译： 公开了实现优先故障转移确定的系统和方法。 一种示例性方法包括至少部分地基于用户输入来对多个网络适配器端口的排序标准进行优先级排序。 该方法还包括基于优先级排序标准确定多个网络适配器端口中的每一个的排序值。 该方法还包括基于多个网络适配器端口中的每一个的排序值来指定主网络适配器端口和至少第二网络适配器端口

    Versatile system for cross-lateral junction field effect transisor
    8.
    发明申请
    Versatile system for cross-lateral junction field effect transisor 有权
    用于跨横向连接场效应的通用系统

    公开(公告)号：US20060151804A1

    公开(公告)日：2006-07-13

    申请号：US11031586

    申请日：2005-01-07

    申请人： Gregory Howard ,  Leland Swanson

    发明人： Gregory Howard ,  Leland Swanson

    IPC分类号： H01L29/423

    CPC分类号： H01L29/808 ,  H01L29/0692

    摘要： The present invention provides a system for providing a cross-lateral junction field effect transistor (114) having desired high-performance desired voltage, frequency or current characteristics. The cross-lateral transistor is formed on a commercial semiconductor substrate (102). A channel structure (124) is formed along the substrate, having source (120) and drain (122) structures laterally formed on opposites sides thereof. A first gate structure (116) is formed along the substrate, laterally adjoining the channel structure orthogonal to the source and drain structures. A second gate structure (118) is formed along the substrate, laterally adjoining the channel structure, orthogonal to the source and drain structures and opposite the first gate structure.

    摘要翻译： 本发明提供了一种用于提供具有期望的高性能期望电压，频率或电流特性的横向结型场效应晶体管（114）的系统。 横向晶体管形成在商用半导体衬底（102）上。 沿着衬底形成通道结构（124），其具有在其相对侧上横向形成的源极（120）和漏极（122）结构。 第一栅极结构（116）沿着衬底形成，横向邻接与源极和漏极结构正交的沟道结构。 第二栅极结构（118）沿着衬底形成，横向邻接沟道结构，垂直于源极和漏极结构并与第一栅极结构相对。

    Tolerance bondwire inductors for analog circuitry
    9.
    发明申请
    Tolerance bondwire inductors for analog circuitry 有权
    用于模拟电路的公差接线电感

    公开(公告)号：US20060099792A1

    公开(公告)日：2006-05-11

    申请号：US10984150

    申请日：2004-11-09

    申请人： Gregory Howard ,  Naveen Yanduru

    发明人： Gregory Howard ,  Naveen Yanduru

    IPC分类号： H01L21/44

    CPC分类号： H01L24/85 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01066 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

    摘要： Disclosed are wirebonding methods wherein bondwires are positioned using dynamically determined variations in die placement. Preferred methods of the invention include steps for placing a die on the prepared substrate using selected ideal placement coordinates. Deviation of the actual die placement from the selected ideal placement coordinates is monitored, and one ore more critical bondwires are wirebonded between respective die pins and pins-on the substrate. The monitored placement deviation is used to dynamically position the critical bondwires on the critical pins according to actual die placement. Disclosed embodiments include methods using lateral deviation monitoring and angular deviation monitoring to dynamically position bondwires.

    摘要翻译： 公开了引线键合方法，其中使用动态确定的管芯放置的变化来定位焊丝。 本发明的优选方法包括使用选择的理想放置坐标将管芯放置在所制备的衬底上的步骤。 监测实际管芯位置与所选择的理想放置坐标的偏差，并且一个或多个关键焊接线在相应的管芯引脚和引脚之间引线接合在衬底上。 监控的放置偏差用于根据实际的管芯位置动态地将关键焊接线定位在关键销上。 公开的实施例包括使用横向偏差监测和角度偏差监测来动态地定位键合线的方法。