摘要:
A wireless communication device (202), such as a cellular telephone, has a power amplifier (218) and a power amplifier control (222). The power amplifier (218) is selectively controllable to amplify, to different output power levels, a signal for transmission. In a high power mode requiring amplification of the signal to a high output power level, the power amplifier control (222) controls the power amplifier to amplify the signal according to a predetermined amplitude waveform (106). In a low power mode requiring amplification of the signal to a low output power level, the power amplifier control controls the power amplifier to amplify the signal according to a delayed one of the predetermined amplitude waveform (300).
摘要:
A power amplifier controller for detecting saturation of the power amplifier (203) and corrects the automatic output control voltage (231) to avoid any further saturation. A detector (211) detects the power of the radio frequency (RF) output signal (211) and generates a signal (229) correlated to the detected power. Comparator (217) compares changes in that signal (229) to changes in the voltage of the AOC signal (231). The comparator (217) generates a signal (233) correlated to saturation of the power amplifier (203) for a DSP (223). The DSP (223) checks the status of this signal (233). Upon detecting saturation, an algorithm contained within the DSP methodically reduces the voltage of the AOC signal (231) until there is a change in the power of the RF output signal (211).
摘要:
The present disclosure includes a discussion of a power amplifier controller which powers up a power amplifier (203) without a substantial burst of frequency noise. The controller has a RF output power detector (211) which generates a signal (229) correllated to the power level of the power amplifier (203). This signal (229) is compared (215) to a reference signal (213) to determine if the power amplifier (203) is active. The signal (227) generated by this comparator (215) is used to determine the voltage level of the Automatic Output Control (AOC) signal (231).
摘要:
Transmitting signals containing amplitude modulated (AM) and phase modulation (PM) components requires a transmitter having AM and PM control loops. The PM control loop provides phase modulation, frequency translation and phase predistortion for the transmitter. The phase predistortion/correction is accomplished by using an oscillator, thus, the amount of PA phase correction is essentially unlimited. Additionally, the PM control loop is nested about a power amplifier (PA), allowing the PM control loop to correct for any distortion introduced by the PA.
摘要:
A voltage controlled oscillator and buffer amplifier circuit (211) is disclosed. The circuit is in a stacked configuration, whereby, the current from the power supply (361) is used by the buffer amplifier circuit and reused by the VCO circuit. The VCO circuit includes two transistors (333, 325). The transistors are set-up in a mirrored configuration, so that one of the transistors (325) controls the bias current in the other transistor (333). Both of the transistors are integrated into a semiconductor circuit die (365), thus, matching the thermal characteristics of the transistors (333, 325) and improving control of the bias current. The die (365) is bonded to a ceramic substrate (601). The substrate (601) has connectivity paths for connecting components in the circuit die to components external to the circuit die. Some of the connectivity paths are made of a material and length to form passive circuit elements.
摘要:
A TC controlled RF signal detecting circuitry (211) used in the output power control circuit of a TDMA RF signal power amplifier includes positive coefficient current source (303) producing current I+ having a positive TC, negative coefficient current source (305) producing current I- having a negative TC, and current mirror (301) for summing currents I+ and I- to produce substantially identical compensated mirror currents Im1 and Im2. Anti-clamping current mirror (309) mirrors current Im2 to produce compensated currents Ia1 and Ia2, which are applied to and bias a Schottky diode coupled in series to a resistor network in each leg of diode detector (311). Each leg of diode detector (311) has a positive TC, which is substantially offset by the negative TC of compensated currents Ia1 and Ia2. Schottky diode (431) in one leg of diode detector (311) half-wave rectifies RF feedback signal (212) to produce temperature and voltage compensated power level signal (229), which has a DC level proportional to the output power level of RF output signal (214). By using TC controlled RF signal detecting circuitry (211), power level signal (229) has a DC level which is stable to within 5 mV over temperature ranging from -55.degree. C. to +125.degree. C. and over power supply voltage ranging from 2.7 V to 4.75 V.
摘要:
A multiple latched accumulator fractional-N synthesizer for use in digital radio transceivers is disclosed. The divisor of the frequency divider (103) of the synthesizer is varied with time by the summation of accumulator carry output digital sequences which result in frequency increments equal to a fraction of the reference frequency. The accumulators (615, 617) are latched such that upon the occurrence of a clock pulse, data is transferred through each accumulator one clock pulse step at a time, such that the delay through the system is equal to that of only one accumulator. The carry outputs of each accumulator are coupled through delays (645, 647, 649, 631, 633) equal to one less delay than the number of accumulators and added (635) such that all higher order accumulator carry outputs add to a net summation of zero so as to not upset the desired fractional setting of the first accumulator.
摘要:
A continuously adaptive phase locked loop synthesizer is disclosed in which error correction pulses from a phase detector are separated into narrow pulse width and wide pulse width pulses. The wide pulse width pulses are coupled to the loop filter to enable a rapid charge of the loop filter to provide a VCO control voltage on a control line connected to the output of the loop filter. The narrow pulse width pulses are filtered by a narrow bandwidth filter before being applied to the loop filter thus enabling a slow charge of the loop filter. The narrow bandwidth filter is decoupled from the control line but referenced to the control line voltage.
摘要:
Embodiments of the present disclosure relate to an radio frequency (RF) power amplifier (PA) module having a saturation corrected integration loop, which includes saturation detection and correction circuitry, an integrator, PA circuitry, and detector circuitry. An integrator output signal from the integrator is prevented from being driven toward a power supply rail in the presence of saturation of the PA circuitry by saturation correction of an input ramp signal. The saturation detection and correction circuitry receives and saturation corrects the input ramp signal to provide a saturation corrected input ramp signal to the integrator based on detecting saturation of the PA circuitry. Saturation of the PA circuitry is detected based on a difference between a desired PA output voltage, as indicated by the input ramp signal, and a detected PA output voltage, as indicated by a detector output signal from the detector circuitry.
摘要:
Disclosed is a method in which slaves are cascaded on a bus, and cascading slave-to-slave communication is used to prioritize (or sequence) the software slave ID programming, enabling users to uniquely identify identical components in a circuit. In one embodiment, the first slave in the cascade stalls the programming of other slaves until the first slave's programming is complete. Once completed, the first slave then enables programming of the second slave, and so on. This embodiment allows multiple placements of identical slaves on the bus, and provides a method to uniquely identify and control each slave by using cascading software slave ID programming. In another embodiment, a structure with a similar effect may be created by lack of enablement (instead of disablement), wherein initially only the first slave is enabled, and subsequent slaves are not initially enabled. Additionally, the present disclosure is compatible with the MIPI RFFE standard interface.