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公开(公告)号:US07813570B2
公开(公告)日:2010-10-12
申请号:US10971545
申请日:2004-10-22
申请人: Guobin Shen , Shipeng Li , Guangping Gao
发明人: Guobin Shen , Shipeng Li , Guangping Gao
IPC分类号: G06K9/36
CPC分类号: H04N21/4143 , H04N19/43 , H04N19/436 , H04N19/557 , H04N19/56
摘要: A video encoding system uses both a central processing unit (CPU) and a graphics processing unit (GPU) to perform video encoding. The system implements a technique that enables the GPU to perform motion estimation for video encoding. The technique allows the GPU to perform a motion estimation process in parallel with the video encoding process performed by the CPU. The performance of video encoding using such a system is greatly accelerated as compared to encoding using just the CPU. Also, data related to motion estimation is arranged and provided to the GPU in a way that utilizes the capabilities of the GPU. Data about video frames may be collocated to enable multiple channels of the GPU to process tasks in parallel. The depth buffer of the GPU may be used to consolidate repeated calculations and searching tasks during the motion estimation process.
摘要翻译: 视频编码系统使用中央处理单元(CPU)和图形处理单元(GPU)来执行视频编码。 该系统实现了使GPU能够执行视频编码的运动估计的技术。 该技术允许GPU与由CPU执行的视频编码处理并行执行运动估计处理。 与仅使用CPU的编码相比,使用这种系统的视频编码的性能大大加快。 此外,与运动估计相关的数据以利用GPU的能力的方式被布置并提供给GPU。 关于视频帧的数据可以并置,以使GPU的多个通道并行处理任务。 GPU的深度缓冲器可以用于在运动估计过程期间合并重复计算和搜索任务。
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公开(公告)号:US07558428B2
公开(公告)日:2009-07-07
申请号:US10939983
申请日:2004-09-13
申请人: Guobin Shen , Shipeng Li , Guangping Gao
发明人: Guobin Shen , Shipeng Li , Guangping Gao
IPC分类号: G06K9/74
CPC分类号: H04N21/4143 , H04N19/43 , H04N19/436 , H04N19/557 , H04N19/56
摘要: The systems and methods described herein are directed at accelerating video encoding using a graphics processing unit. In one aspect, a video encoding system uses both a central processing unit (CPU) and a graphics processing unit (GPU) to perform video encoding. The system implements a technique that enables the GPU to perform motion estimation for video encoding. The technique allows the GPU to perform a motion estimation process in parallel with the video encoding process performed by the CPU. The performance of video encoding using such a system is greatly accelerated as compared to encoding using just the CPU.In another aspect, data related to motion estimation is arranged and provided to the GPU in a way that utilizes the capabilities of the GPU. Data about video frames may be collocated to enable multiple channels of the GPU to process tasks in parallel. The depth buffer of the GPU may be used to consolidate repeated calculations and searching tasks during the motion estimation process. The use of frame collocation and depth buffer enables the GPU to be better utilized and to further accelerate video encoding.
摘要翻译: 这里描述的系统和方法涉及使用图形处理单元加速视频编码。 一方面,视频编码系统同时使用中央处理单元(CPU)和图形处理单元(GPU)来执行视频编码。 该系统实现了使GPU能够执行视频编码的运动估计的技术。 该技术允许GPU与由CPU执行的视频编码处理并行执行运动估计处理。 与仅使用CPU的编码相比,使用这种系统的视频编码的性能大大加快。 在另一方面,与运动估计相关的数据以利用GPU的能力的方式被布置并提供给GPU。 关于视频帧的数据可以并置,以使GPU的多个通道并行处理任务。 GPU的深度缓冲器可以用于在运动估计过程期间合并重复计算和搜索任务。 使用帧搭配和深度缓冲器可以更好地利用GPU并进一步加速视频编码。
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3.
公开(公告)号:US07433946B2
公开(公告)日:2008-10-07
申请号:US10917243
申请日:2004-08-12
申请人: Guobin Shen , Shipeng Li , Hua Cai , Regis J. Crinon , Ze-wen Zhang , Guangping Gao , Hong-Hui Sun , Baogang Yao
发明人: Guobin Shen , Shipeng Li , Hua Cai , Regis J. Crinon , Ze-wen Zhang , Guangping Gao , Hong-Hui Sun , Baogang Yao
IPC分类号: G06F15/173 , G06F15/16 , G06F5/00
CPC分类号: H04L65/4076 , H04L29/06027 , H04L65/607
摘要: The techniques and mechanisms described herein are directed at transmitting elementary streams in a broadcast environment. The mechanisms provide a buffer controller and packet scheduler that allow a media format to be transmitted through the broadcasting environment in a manner resulting in a low channel switch delay. A buffer-fullness indicator allows the operation with various types of decoders. A lower bound and an upper bound are calculated for each frame within the elementary stream. The lower bound corresponds to an earliest time for sending the frame without causing an overflow condition within a decoder buffer. The upper bound corresponds to a latest time for sending the frame without causing an underflow condition within the decoder buffer. A send time is then scheduled based on the lower bound and the upper bound that determines when a packet associated with the frame is transmitted over a channel in a broadcast environment.
摘要翻译: 这里描述的技术和机制针对在广播环境中传输基本流。 这些机制提供了一种缓冲器控制器和分组调度器,其允许以导致低通道切换延迟的方式通过广播环境传输媒体格式。 缓冲器充满度指示器允许使用各种类型的解码器进行操作。 为基本流中的每个帧计算下限和上限。 下限对应于发送帧的最早时间,而不会导致解码器缓冲器内的溢出状况。 上限对应于在解码器缓冲器内不发生下溢条件的发送帧的最新时间。 然后基于下限和上限来调度发送时间,该下限和上限确定与广播环境中的信道相关联的分组何时发送。
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4.
公开(公告)号:US20060036759A1
公开(公告)日:2006-02-16
申请号:US10917243
申请日:2004-08-12
申请人: Guobin Shen , Shipeng Li , Hua Cai , Regis Crinon , Ze-wen Zhang , Guangping Gao , Hong-Hui Sun , Baogang Yao
发明人: Guobin Shen , Shipeng Li , Hua Cai , Regis Crinon , Ze-wen Zhang , Guangping Gao , Hong-Hui Sun , Baogang Yao
IPC分类号: G06F15/16
CPC分类号: H04L65/4076 , H04L29/06027 , H04L65/607
摘要: The techniques and mechanisms described herein are directed at transmitting elementary streams in a broadcast environment. The mechanisms provide a buffer controller and packet scheduler that allow a media format to be transmitted through the broadcasting environment in a manner resulting in a low channel switch delay. A buffer-fullness indicator allows the operation with various types of decoders. A lower bound and an upper bound are calculated for each frame within the elementary stream. The lower bound corresponds to an earliest time for sending the frame without causing an overflow condition within a decoder buffer. The upper bound corresponds to a latest time for sending the frame without causing an underflow condition within the decoder buffer. A send time is then scheduled based on the lower bound and the upper bound that determines when a packet associated with the frame is transmitted over a channel in a broadcast environment.
摘要翻译: 这里描述的技术和机制针对在广播环境中传输基本流。 这些机制提供了一种缓冲器控制器和分组调度器,其允许以导致低通道切换延迟的方式通过广播环境传输媒体格式。 缓冲器充满度指示器允许使用各种类型的解码器进行操作。 为基本流中的每个帧计算下限和上限。 下限对应于发送帧的最早时间,而不会导致解码器缓冲器内的溢出状况。 上限对应于在解码器缓冲器内不发生下溢条件的发送帧的最新时间。 然后基于下限和上限来调度发送时间,该下限和上限确定与广播环境中的信道相关联的分组何时发送。
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公开(公告)号:US20060056513A1
公开(公告)日:2006-03-16
申请号:US10971545
申请日:2004-10-22
申请人: Guobin Shen , Shipeng Li , Guangping Gao
发明人: Guobin Shen , Shipeng Li , Guangping Gao
CPC分类号: H04N21/4143 , H04N19/43 , H04N19/436 , H04N19/557 , H04N19/56
摘要: A video encoding system uses both a central processing unit (CPU) and a graphics processing unit (GPU) to perform video encoding. The system implements a technique that enables the GPU to perform motion estimation for video encoding. The technique allows the GPU to perform a motion estimation process in parallel with the video encoding process performed by the CPU. The performance of video encoding using such a system is greatly accelerated as compared to encoding using just the CPU. Also, data related to motion estimation is arranged and provided to the GPU in a way that utilizes the capabilities of the GPU. Data about video frames may be collocated to enable multiple channels of the GPU to process tasks in parallel. The depth buffer of the GPU may be used to consolidate repeated calculations and searching tasks during the motion estimation process.
摘要翻译: 视频编码系统使用中央处理单元(CPU)和图形处理单元(GPU)来执行视频编码。 该系统实现了使GPU能够执行视频编码的运动估计的技术。 该技术允许GPU与由CPU执行的视频编码处理并行执行运动估计处理。 与仅使用CPU的编码相比,使用这种系统的视频编码的性能大大加快。 此外,与运动估计相关的数据以利用GPU的能力的方式被布置并提供给GPU。 关于视频帧的数据可以并置,以使GPU的多个通道并行处理任务。 GPU的深度缓冲器可以用于在运动估计过程期间合并重复计算和搜索任务。
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公开(公告)号:US20060056708A1
公开(公告)日:2006-03-16
申请号:US10939983
申请日:2004-09-13
申请人: Guobin Shen , Shipeng Li , Guangping Gao
发明人: Guobin Shen , Shipeng Li , Guangping Gao
IPC分类号: G06K9/36
CPC分类号: H04N21/4143 , H04N19/43 , H04N19/436 , H04N19/557 , H04N19/56
摘要: The systems and methods described herein are directed at accelerating video encoding using a graphics processing unit. In one aspect, a video encoding system uses both a central processing unit (CPU) and a graphics processing unit (GPU) to perform video encoding. The system implements a technique that enables the GPU to perform motion estimation for video encoding. The technique allows the GPU to perform a motion estimation process in parallel with the video encoding process performed by the CPU. The performance of video encoding using such a system is greatly accelerated as compared to encoding using just the CPU. In another aspect, data related to motion estimation is arranged and provided to the GPU in a way that utilizes the capabilities of the GPU. Data about video frames may be collocated to enable multiple channels of the GPU to process tasks in parallel. The depth buffer of the GPU may be used to consolidate repeated calculations and searching tasks during the motion estimation process. The use of frame collocation and depth buffer enables the GPU to be better utilized and to further accelerate video encoding.
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公开(公告)号:US08447121B2
公开(公告)日:2013-05-21
申请号:US11226590
申请日:2005-09-14
申请人: Guobin Shen , Shipeng Li , Wanyong Cao , Yuwen He
发明人: Guobin Shen , Shipeng Li , Wanyong Cao , Yuwen He
CPC分类号: H04N21/23608 , H04N19/105 , H04N19/107 , H04N19/124 , H04N19/127 , H04N19/132 , H04N19/14 , H04N19/149 , H04N19/159 , H04N19/176 , H04N19/18 , H04N19/186 , H04N19/196 , H04N19/40 , H04N19/48 , H04N19/51 , H04N19/513 , H04N19/577 , H04N19/59 , H04N19/61 , H04N21/4344
摘要: Efficient integrated digital video transcoding is described. In one aspect, an integrated transcoder receives an encoded bitstream. The integrated transcoder transcodes the encoded bitstream by partially decoding the encoded bitstream based on a first transform associated with a first media data format. The decoding operations generate an intermediate data stream. The integrated transcoder then encodes the intermediate data stream using a second transform associated with a second media data format. The first and second transforms are not the same.
摘要翻译: 描述了高效的集成数字视频转码。 在一个方面,集成代码转换器接收编码比特流。 集成的代码转换器通过基于与第一媒体数据格式相关联的第一变换部分地解码编码的比特流来对经编码比特流进行转码。 解码操作生成中间数据流。 然后,集成代码转换器使用与第二媒体数据格式相关联的第二变换对中间数据流进行编码。 第一和第二变换是不一样的。
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公开(公告)号:US07283589B2
公开(公告)日:2007-10-16
申请号:US10385014
申请日:2003-03-10
申请人: Hua Cai , Guobin Shen , Zixiang Xiong , Shipeng Li , Bing Zeng
发明人: Hua Cai , Guobin Shen , Zixiang Xiong , Shipeng Li , Bing Zeng
IPC分类号: H04N7/12
CPC分类号: H04N21/236 , H04N19/105 , H04N19/147 , H04N19/187 , H04N19/19 , H04N19/34 , H04N19/67 , H04N19/89
摘要: A video encoding system performs packetization of FGS/PFGS encoded video bitstreams by selecting encoded bitstream segments for packetization based on an estimated total contribution to distortion reduction associated with each encoded bitstream segment. The selected bitstream segments are then packetized according to a packet-independence packetization strategy that minimizes inter-packet dependency.
摘要翻译: 视频编码系统通过基于与每个编码的比特流片段相关联的对失真降低的估计总贡献来选择用于分组的编码比特流片段来执行FGS / PFGS编码视频比特流的分组化。 所选择的比特流片段然后根据分组独立分组策略进行分组化,使分组间依赖性最小化。
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公开(公告)号:US20070058718A1
公开(公告)日:2007-03-15
申请号:US11226590
申请日:2005-09-14
申请人: Guobin Shen , Shipeng Li , Wanyong Cao , Yuwen He
发明人: Guobin Shen , Shipeng Li , Wanyong Cao , Yuwen He
CPC分类号: H04N21/23608 , H04N19/105 , H04N19/107 , H04N19/124 , H04N19/127 , H04N19/132 , H04N19/14 , H04N19/149 , H04N19/159 , H04N19/176 , H04N19/18 , H04N19/186 , H04N19/196 , H04N19/40 , H04N19/48 , H04N19/51 , H04N19/513 , H04N19/577 , H04N19/59 , H04N19/61 , H04N21/4344
摘要: Efficient integrated digital video transcoding is described. In one aspect, an integrated transcoder receives an encoded bitstream. The integrated transcoder transcodes the encoded bitstream by partially decoding the encoded bitstream based on a first transform associated with a first media data format. The decoding operations generate an intermediate data stream. The integrated transcoder then encodes the intermediate data stream using a second transform associated with a second media data format. The first and second transforms are not the same.
摘要翻译: 描述了高效的集成数字视频转码。 在一个方面,集成代码转换器接收编码比特流。 集成的代码转换器通过基于与第一媒体数据格式相关联的第一变换部分地解码编码的比特流来对经编码比特流进行转码。 解码操作生成中间数据流。 然后,集成代码转换器使用与第二媒体数据格式相关联的第二变换对中间数据流进行编码。 第一和第二变换是不一样的。
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公开(公告)号:US07646817B2
公开(公告)日:2010-01-12
申请号:US10402882
申请日:2003-03-28
申请人: Guobin Shen , Lihua Zhu , Shipeng Li , Ya-Qin Zhang , Richard F. Rashid
发明人: Guobin Shen , Lihua Zhu , Shipeng Li , Ya-Qin Zhang , Richard F. Rashid
IPC分类号: H04N7/18
CPC分类号: H04N19/43 , H04N19/127 , H04N19/159 , H04N19/42 , H04N19/51
摘要: An accelerated video decoding system utilizes a graphics processing unit to perform motion compensation, image reconstruction, and color space conversion processes, while utilizing a central processing unit to perform other decoding processes.
摘要翻译: 加速视频解码系统利用图形处理单元执行运动补偿,图像重构和色彩空间转换处理,同时利用中央处理单元执行其它解码过程。
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