公开(公告)号：US11953766B2

公开(公告)日：2024-04-09

申请号：US17843352

申请日：2022-06-17

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Stanley Cheung ,  Geza Kurczveil ,  Yuan Yuan ,  Xian Xiao ,  Raymond G. Beausoleil

IPC: G02F1/017

CPC classification number: G02F1/01708

Abstract: Implementations disclosed herein provide for devices and methods for obtaining parity time (PT) symmetric directional couplers through improved phase tuning, along with separate optical gain and optical loss tuning. The present disclosure integrates phase tuning and optical gain/loss tuning structures into waveguides of directional couplers disclosed herein. In some examples, directional couplers disclosed herein integrate one or more hybrid metal-oxide-semiconductor capacitors (MOSCAPs) formed by a dielectric layer between two semiconductor layers that provide for phase tuning via plasma dispersion and/or carrier accumulation depending on voltage bias polarity, and one or more optically active medium that provide for optical gain or loss tuning depending on voltage bias polarity.

公开(公告)号：US11036014B1

公开(公告)日：2021-06-15

申请号：US16777868

申请日：2020-01-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Mir Ashkan Seyedi ,  Geza Kurczveil

IPC: H04B10/27 ,  G02B6/42 ,  H04B10/50 ,  G02B6/293 ,  H04B10/61 ,  H04B10/54

Abstract: Improved systems and methods are provided to implement coherent communication. The system includes an interposer to route the components of an integrated photonic circuit. The interposer provides an interface to couple the components of the integrated photonic circuit including an optical source, modulator, coherent transmitter, coherent receiver, and interconnects therebetween. The optical source can be a grating-coupled surface-emitting laser (GCSEL). The GCSEL splits an optical signal into two symmetrical optical signals that are directed by a waveguide to a coherent transmitter and/or a coherent receiver of the integrated photonic circuit. Coherent communication is maintained and the need for a second laser in the coherent receiver is avoided through the structure of the GCSEL granting dual functional to the optical source.

公开(公告)号：US10811549B2

公开(公告)日：2020-10-20

申请号：US16260256

申请日：2019-01-29

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Geza Kurczveil ,  Di Liang ,  Bassem Tossoun ,  Chong Zhang ,  Xiaoge Zeng ,  Zhihong Huang ,  Raymond Beausoleil

IPC: H01L31/0352 ,  H01L31/0232 ,  H01L31/107 ,  H01L31/0304

Abstract: A quantum-dot based avalanche photodiode (QD-APD) may include a silicon substrate and a waveguide on which a quantum dot (QD) stack of layers is formed having a QD light absorption layer, a charge multiplication layer (CML), and spacer layers. The QD stack may be formed within a p-n junction. The waveguide may include a mode converter to facilitate optical coupling and light transfer from the waveguide to the QD light absorption layer. The QD absorption layer and the CML layer may be combined or separate layers. The CML may generate electrical current from the absorbed light with more than 100% quantum efficiency when the p-n junction is reverse-biased.

公开(公告)号：US10795084B2

公开(公告)日：2020-10-06

申请号：US16666053

申请日：2019-10-28

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Di Liang ,  Geza Kurczveil ,  Raymond G. Beausoleil

IPC: G02B6/136 ,  G02B6/124 ,  H01S3/063 ,  H01S3/23 ,  H01S5/10 ,  H01S5/20 ,  H01S5/02 ,  G02B6/12 ,  G02B6/13 ,  G02B5/18 ,  G02B6/122 ,  G02B27/42

Abstract: A hybrid grating comprises a first grating layer composed of a first solid-state material, and a second grating layer over the first grating layer and composed of a second solid-state material, the second solid state-material being different than the first solid-state material and having a monocrystalline structure.

公开(公告)号：US20200003971A1

公开(公告)日：2020-01-02

申请号：US16023596

申请日：2018-06-29

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Ashkan Seyedi ,  Marco Florentino ,  Geza Kurczveil ,  Raymond G. Beausoleil

IPC: G02B6/42 ,  G02B6/32 ,  G02B6/30 ,  G02B6/124 ,  G02B6/34 ,  G02B6/12 ,  H01S5/0683

Abstract: Processes and apparatuses described herein reduce the manufacturing time, the cost of parts, and the cost of assembly per laser for photonic interconnects incorporated into computing systems. An output side of a laser assembly is placed against an input side of a silicon interposer (SiP) such that each pad in a plurality of pads positioned on the output side of the laser assembly is in contact with a respective solder bump that is also in contact with a corresponding pad positioned on the input side of the SiP. The laser assembly is configured to emit laser light from the output side into an input grating of the SiP. The solder bumps are heated to a liquid phase. Capillary forces of the solder bumps realign the laser assembly and the SiP while the solder bumps are in the liquid phase. The solder bumps are then allowed to cool.

公开(公告)号：US20190089129A1

公开(公告)日：2019-03-21

申请号：US16132070

申请日：2018-09-14

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Di Liang ,  Geza Kurczveil ,  Raymond G. Beausoleil ,  Marco Fiorentino

IPC: H01S5/343 ,  H01S3/23 ,  H01S3/063 ,  H01S5/02 ,  H01S5/34 ,  H01S5/042 ,  H01S5/32 ,  H01S5/347 ,  H01S5/026 ,  H01S5/10

CPC classification number: H01S5/343 ,  H01S3/0637 ,  H01S3/2375 ,  H01S5/021 ,  H01S5/0216 ,  H01S5/0261 ,  H01S5/0424 ,  H01S5/1032 ,  H01S5/3211 ,  H01S5/3412 ,  H01S5/347

Abstract: An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer.

公开(公告)号：US20240295695A1

公开(公告)日：2024-09-05

申请号：US18116696

申请日：2023-03-02

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Geza Kurczveil ,  Raymond G. Beausoleil

IPC: G02B6/136 ,  G02B6/122

CPC classification number: G02B6/136 ,  G02B6/122 ,  G02B2006/12097 ,  G02B2006/12173

Abstract: One aspect can provide a method for fabricating a photonic integrated circuit (PIC) with an embedded optical power monitor. The method can include creating a photomask based on a design of the PIC, the photomask comprising a pattern defining an optical waveguide for embedding the optical power monitor. Creating the photomask can include introducing a predetermined level of roughness along at least one edge of the pattern defining the optical waveguide. The method can further include fabricating the PIC, which can include using the photomask to create the optical waveguide with the introduced roughness on a sidewall corresponding to the edge of the pattern, thereby allowing light absorbed by the roughness to create free carriers for detection by the optical power monitor.

公开(公告)号：US10680408B2

公开(公告)日：2020-06-09

申请号：US16108399

申请日：2018-08-22

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Geza Kurczveil ,  Chong Zhang ,  Di Liang ,  Raymond G. Beausoleil

IPC: H01S5/10 ,  H01S5/50 ,  H01S5/34 ,  H01S5/343 ,  H01S5/065 ,  H01S5/14 ,  H01S5/022

Abstract: A quantum dot comb laser includes a body defining a lasing cavity and an extension defining an external cavity, the FSR of the lasing cavity being an inverse of an integer multiple of the FSR of the external cavity.

公开(公告)号：US20200067273A1

公开(公告)日：2020-02-27

申请号：US16671303

申请日：2019-11-01

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Geza Kurczveil ,  Di Liang ,  Raymond G. Beausoleil

IPC: H01S5/10 ,  H01S5/34 ,  H01S5/065 ,  H01S5/06 ,  H01S5/22 ,  H01S5/02

Abstract: Examples disclosed herein relate to multi-wavelength semiconductor lasers. In some examples disclosed herein, a multi-wavelength semiconductor laser may include a silicon-on-insulator (SOI) substrate and a quantum dot (QD) layer above the SOI substrate. The QD layer may include and active gain region and may have at least one angled junction at one end of the QD layer. The SOI substrate may include a waveguide in an upper silicon layer and a mode converter to facilitate optical coupling of a lasing mode to the waveguide.

公开(公告)号：US10551577B2

公开(公告)日：2020-02-04

申请号：US16023596

申请日：2018-06-29

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Ashkan Seyedi ,  Marco Fiorentino ,  Geza Kurczveil ,  Raymond G. Beausoleil

IPC: G02B6/34 ,  G02B6/42 ,  G02B6/32 ,  G02B6/30 ,  G02B6/124 ,  G02B6/12 ,  H01S5/0683

Abstract: Processes and apparatuses described herein reduce the manufacturing time, the cost of parts, and the cost of assembly per laser for photonic interconnects incorporated into computing systems. An output side of a laser assembly is placed against an input side of a silicon interposer (SiP) such that each pad in a plurality of pads positioned on the output side of the laser assembly is in contact with a respective solder bump that is also in contact with a corresponding pad positioned on the input side of the SiP. The laser assembly is configured to emit laser light from the output side into an input grating of the SiP. The solder bumps are heated to a liquid phase. Capillary forces of the solder bumps realign the laser assembly and the SiP while the solder bumps are in the liquid phase. The solder bumps are then allowed to cool.