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    Read circuitry for electrostatic discharge switching memristive element
    1.
    发明授权
    Read circuitry for electrostatic discharge switching memristive element 有权

    公开(公告)号：US10811065B2

    公开(公告)日：2020-10-20

    申请号：US15568458

    申请日：2015-06-05

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Brent Buchanan ,  Ning Ge ,  Richard James Auletta

    IPC: G11C7/24 ,  G11C29/50 ,  G11C13/00 ,  G11C5/06 ,  H02H1/00 ,  H02H9/04

    Abstract: In the examples provided herein, an apparatus has a memristive element coupled to a pin of an integrated circuit, wherein the memristive element switches from a first resistance within a first range of resistance values to a second resistance within a second range of resistance values in response to an electrostatic discharge (ESD) event at the pin. The apparatus also has read circuitry coupled to the memristive element to determine whether a resistance of the memristive element is in the first or second range of resistance values, wherein the read circuitry includes a first transistor. Further, the coupling between the read circuitry and the memristive element does not include a direct path for current from the ESD event to a gate terminal of the first transistor.

    Nonvolatile memory cross-bar array
    4.
    发明授权
    Nonvolatile memory cross-bar array 有权

    公开(公告)号：US10181349B2

    公开(公告)日：2019-01-15

    申请号：US15535765

    申请日：2014-12-15

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Ning Ge ,  Jianhua Yang ,  John Paul Strachan ,  Miao Hu

    IPC: G11C13/00 ,  G06G7/16

    Abstract: Provided in one example is a nonvolatile memory cross-bar array. The array includes: a number of junctions formed by a number of row lines intersecting a number of column lines; a first set of controls at a first set of the junctions coupling between a first set of the row lines and a first set of the column lines; a second set of controls at a second set of the junctions coupling between a second set of the row lines and a second set of the column lines; and a current collection line to collect currents from the controls of the first set and the second set through their respective column lines and output a result current corresponding to a sum of a first dot product and a second dot product.

    Resistive memory devices and arrays
    5.
    发明授权
    Resistive memory devices and arrays 有权

    公开(公告)号：US10096651B2

    公开(公告)日：2018-10-09

    申请号：US15329913

    申请日：2015-01-29

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Jianhua Yang ,  Ning Ge ,  Katy Samuels ,  Minxian Max Zhang

    IPC: H01L27/24 ,  G11C13/00 ,  H01L45/00 ,  G11C11/16

    Abstract: A resistive memory device includes a first electrode, a memristor coupled in electrical series with the first electrode, a second electrode coupled in electrical series with the memristor, a selector coupled in electrical series with the second electrode, and a third electrode coupled in electrical series with the selector. The memristor includes oxygen or nitrogen elements. The selector includes a composite dielectric material of a first dielectric material, a second dielectric material that is different from the first dielectric material, and a dopant material including a cation having a migration rate faster than the oxygen or the nitrogen elements of the memristor. The first dielectric material and the second dielectric material are present in a ratio ranging from 1:9 to 9:1, and a concentration of the dopant material in the composite dielectric material ranges from about 1% up to 50%.

    Double bias memristive dot product engine for vector processing
    10.
    发明授权
    Double bias memristive dot product engine for vector processing 有权

    公开(公告)号：US10109348B2

    公开(公告)日：2018-10-23

    申请号：US15522364

    申请日：2014-10-30

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Miao Hu ,  Jianhua Yang ,  John Paul Strachan ,  Ning Ge

    IPC: G11C13/00 ,  G06F17/16

    Abstract: A double bias dot-product engine for vector processing is described. The dot product engine includes a crossbar array having N×M memory elements to store information corresponding to values contained in an N×M matrix, each memory element being a memristive storage device. First and second vector input registers including N voltage inputs, each voltage input corresponding to a value contained in a vector having N×1 values. The vector input registers are connected to the crossbar array to supply voltage inputs to each of N row electrodes at two locations along the electrode. A vector output register is also included to receive voltage outputs from each of M column electrodes.

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