公开(公告)号：US09678918B2

公开(公告)日：2017-06-13

申请号：US15280700

申请日：2016-09-29

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Jian He ,  Guangyu Shi ,  Xiaoke Ni ,  Norbert Egi ,  Xiancai Li ,  Yu Liu ,  Huawei Liu

IPC: G06F13/12 ,  G06F13/38 ,  G06F13/42 ,  G06F3/06 ,  G06F13/10 ,  G06F12/10 ,  G06F13/28 ,  G06F13/40

CPC classification number: G06F13/4282 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0655 ,  G06F3/0673 ,  G06F12/10 ,  G06F13/10 ,  G06F13/28 ,  G06F13/4022 ,  G06F13/4221 ,  G06F2212/1016

Abstract: Embodiments of the present invention provide a data processing system and a data processing method. An MMIO address of a data request is obtained, where data stored in a PCIe storage device can be directly obtained from the MMIO address, and according to the MMIO address, a network adapter can directly read the data from the PCIe storage device of the data processing system, and transmit the data to a second data processing system, or directly write the data received from the second data processing system into the PCIe storage device. Therefore, the processing system can implement transmitting data directly from the PCIe storage device to the network adapter without using memory. During data transmission between the two data processing systems, a usage ratio of a resource, such as memory and a CPU, is reduced, and efficiency of data transmission is improved.

公开(公告)号：US20170017607A1

公开(公告)日：2017-01-19

申请号：US15280700

申请日：2016-09-29

Applicant: HUAWEI TECHNOLOGIES CO.,LTD.

Inventor： Jian He ,  Guangyu Shi ,  Xiaoke Ni ,  Norbert Egi ,  Xiancai Li ,  Yu Liu ,  Huawei Liu

IPC: G06F13/42 ,  G06F12/10 ,  G06F13/28 ,  G06F3/06

CPC classification number: G06F13/4282 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0655 ,  G06F3/0673 ,  G06F12/10 ,  G06F13/10 ,  G06F13/28 ,  G06F13/4022 ,  G06F13/4221 ,  G06F2212/1016

Abstract: Embodiments of the present invention provide a data processing system and a data processing method. An MMIO address of a data request is obtained, where data stored in a PCIe storage device can be directly obtained from the MMIO address, and according to the MMIO address, a network adapter can directly read the data from the PCIe storage device of the data processing system, and transmit the data to a second data processing system, or directly write the data received from the second data processing system into the PCIe storage device. Therefore, the processing system can implement transmitting data directly from the PCIe storage device to the network adapter without using memory. During data transmission between the two data processing systems, a usage ratio of a resource, such as memory and a CPU, is reduced, and efficiency of data transmission is improved.

Abstract translation: 本发明的实施例提供了一种数据处理系统和数据处理方法。 获得数据请求的MMIO地址，其中可以从MMIO地址直接获取存储在PCIe存储设备中的数据，并且根据MMIO地址，网络适配器可以直接从PCIe存储设备读取数据 处理系统，并将数据发送到第二数据处理系统，或直接将从第二数据处理系统接收的数据写入PCIe存储设备。 因此，处理系统可以在不使用存储器的情况下实现从PCIe存储设备直接发送数据到网络适配器。 在两个数据处理系统之间的数据传输期间，诸如存储器和CPU之类的资源的使用率被降低，并且提高了数据传输的效率。

公开(公告)号：US12124886B2

公开(公告)日：2024-10-22

申请号：US17232195

申请日：2021-04-16

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xiaoke Ni ,  Jinpeng Chen ,  Hao Lan

IPC: G06F9/50 ,  G06F13/28

CPC classification number: G06F9/5077 ,  G06F9/5011 ,  G06F9/5072 ,  G06F13/28 ,  G06F2209/5011

Abstract: This disclosure provides a data processing method, including: receiving, by a first computing device, a first packet sent by a second computing device, where the first computing device is configured to assist the second computing device in performing service processing, the first computing device is a computing device in a heterogeneous resource pool, the first computing device communicates with the second computing device through a network, the heterogeneous resource pool includes at least one first computing device, and the first packet includes an instruction used to request the first computing device to process to-be-processed data; processing, by the first computing device, the to-be-processed data based on the instruction; and sending, by the first computing device, a second packet to the second computing device, where the second packet includes a processing result of the to-be-processed data.

公开(公告)号：US10983731B2

公开(公告)日：2021-04-20

申请号：US16789141

申请日：2020-02-12

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiaoke Ni ,  Yimin Yao

IPC: G06F3/06 ,  G06F13/42 ,  G06F13/40 ,  G06F13/38

Abstract: A packet forwarding method, device, and system for use in non-volatile memory express (NVMe) over fabric are described. According to the method, a first packet sent by a control device is received; a second packet is generated according to the first packet; a network port for forwarding the second packet is selected according to an identity of a target non-volatile memory; and the second packet is encapsulated into a packet that meets an NVMe over fabric forwarding requirement, and the encapsulated second packet is sent by using the selected network port.

公开(公告)号：US09329783B2

公开(公告)日：2016-05-03

申请号：US14704735

申请日：2015-05-05

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Guangyu Shi ,  Xiaoke Ni ,  Norbert Egi ,  Xiancai Li ,  Yu Liu ,  Huawei Liu

IPC: G06F13/12 ,  G06F13/38 ,  G06F3/06 ,  G06F13/10 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4282 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0655 ,  G06F3/0673 ,  G06F12/10 ,  G06F13/10 ,  G06F13/28 ,  G06F13/4022 ,  G06F13/4221 ,  G06F2212/1016

Abstract: Embodiments of the present invention provide a data processing system and a data processing method. An MMIO address of a data request is obtained, where data stored in a PCIe storage device can be directly obtained from the MMIO address, and according to the MMIO address, a network adapter can directly read the data from the PCIe storage device of the data processing system, and transmit the data to a second data processing system, or directly write the data received from the second data processing system into the PCIe storage device. Therefore, the processing system can implement transmitting data directly from the PCIe storage device to the network adapter without using memory. During data transmission between the two data processing systems, a usage ratio of a resource, such as memory and a CPU, is reduced, and efficiency of data transmission is improved.

公开(公告)号：US10585628B2

公开(公告)日：2020-03-10

申请号：US15961851

申请日：2018-04-24

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiaoke Ni ,  Yimin Yao

IPC: G06F15/167 ,  G06F3/06 ,  G06F13/42 ,  G06F13/40 ,  G06F13/38

Abstract: A packet forwarding method, device, and system for use in non-volatile memory express (NVMe) over fabric. According to the method, a first packet sent by a control device is received, and an input/output command or a management command that complies with the NVMe protocol and that is included in the first packet is obtained; a second packet is generated according to the input/output command or the management command, where the input/output command or the management command complies with the NVMe protocol and is included in the first packet, and the second packet is a packet for executing the input/output command or the management command; a network port for forwarding the second packet is selected according to an identity of a target non-volatile memory; and the second packet is encapsulated into a packet that meets an NVMe over fabric forwarding requirement, and the encapsulated second packet is sent by using the selected network port.

公开(公告)号：US20200050551A1

公开(公告)日：2020-02-13

申请号：US16598755

申请日：2019-10-10

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiaoke Ni

IPC: G06F12/0875 ,  G06F13/16

Abstract: In a data access method, after an interface card receives a first data write instruction or a first data read instruction, the interface card generates a second data write instruction or a second data read instruction, and writes the second data write instruction or the second data read instruction into a cache. No resource of a processor of a storage device is used. After the interface card writes the second data write instruction or the second data read instruction into the cache, a cache control unit sends the second data write instruction or the second data read instruction to a storage subsystem. No resource of the processor of the storage device is used. Alternatively, the cache control unit may instruct the storage subsystem to execute the second data write instruction or the second data read instruction.

公开(公告)号：US20170168849A1

公开(公告)日：2017-06-15

申请号：US15443452

申请日：2017-02-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiancai Li ,  Xiaoke Ni ,  Yimin Yao

IPC: G06F9/44 ,  G06F11/27 ,  G11C29/12 ,  G06F11/22

Abstract: A computer device and a memory startup method of a computer are provided, where a basic input/output system initializes only a first part of memory in a memory initialization phase after a computer is powered on and started, so that an operating system can be started, and after the operating system is started, the basic input/output system continues to initialize memory that is not initialized in the computer, so that, in a startup phase, the computer can start the operating system without needing to wait until all memory has been initialized; therefore, a time from being started to entering the operating system is reduced for the computer, and a user can quickly enter the operating system to perform an operation, thereby improving user experience.

公开(公告)号：US11144465B2

公开(公告)日：2021-10-12

申请号：US16598755

申请日：2019-10-10

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiaoke Ni

IPC: G06F13/16 ,  G06F12/0875

Abstract: In a data access method, after an interface card receives a first data write instruction or a first data read instruction, the interface card generates a second data write instruction or a second data read instruction, and writes the second data write instruction or the second data read instruction into a cache. No resource of a processor of a storage device is used. After the interface card writes the second data write instruction or the second data read instruction into the cache, a cache control unit sends the second data write instruction or the second data read instruction to a storage subsystem. No resource of the processor of the storage device is used. Alternatively, the cache control unit may instruct the storage subsystem to execute the second data write instruction or the second data read instruction.

公开(公告)号：US10481916B2

公开(公告)日：2019-11-19

申请号：US15443452

申请日：2017-02-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiancai Li ,  Xiaoke Ni ,  Yimin Yao

IPC: G06F9/44 ,  G11C29/14 ,  G11C29/08 ,  G11C29/12 ,  G06F11/27 ,  G06F11/22 ,  G11C29/04 ,  G11C7/20 ,  G06F9/4401

Abstract: A computer device and a memory startup method of a computer are provided, where a basic input/output system initializes only a first part of memory in a memory initialization phase after a computer is powered on and started, so that an operating system can be started, and after the operating system is started, the basic input/output system continues to initialize memory that is not initialized in the computer, so that, in a startup phase, the computer can start the operating system without needing to wait until all memory has been initialized; therefore, a time from being started to entering the operating system is reduced for the computer, and a user can quickly enter the operating system to perform an operation, thereby improving user experience.