Method of forming an SOI substrate contact
    1.
    发明授权
    Method of forming an SOI substrate contact 有权
    形成SOI衬底接触的方法

    公开(公告)号:US07867893B2

    公开(公告)日:2011-01-11

    申请号:US11769914

    申请日:2007-06-28

    IPC分类号: H01L27/01

    摘要: A method is provided of forming a conductive via for contacting a bulk semiconductor region of a semiconductor-on-insulator (“SOI”) substrate. A first opening is formed in a conformal layer overlying a trench isolation region, where the trench isolation region shares an edge with the SOI layer. A dielectric layer then is deposited atop the conformal layer and the trench isolation region, after which a second opening is formed which is aligned with the first opening, the second opening extending through the dielectric layer to expose the bulk semiconductor region. Finally, the conductive via is formed in the second opening.

    摘要翻译: 提供了形成用于接触绝缘体上半导体(“SOI”)衬底的体半导体区域的导电通孔的方法。 第一开口形成在覆盖沟槽隔离区域的共形层中,其中沟槽隔离区域与SOI层共享边缘。 然后在保形层和沟槽隔离区的顶部沉积电介质层,然后形成与第一开口对准的第二开口,第二开口延伸穿过电介质层以暴露体半导体区域。 最后,在第二开口中形成导电通孔。

    METHOD OF FORMING AN SOI SUBSTRATE CONTACT
    2.
    发明申请
    METHOD OF FORMING AN SOI SUBSTRATE CONTACT 有权
    形成SOI衬底接触的方法

    公开(公告)号:US20090001466A1

    公开(公告)日:2009-01-01

    申请号:US11769914

    申请日:2007-06-28

    IPC分类号: H01L21/4763 H01L27/01

    摘要: A method is provided of forming a conductive via for contacting a bulk semiconductor region of a semiconductor-on-insulator (“SOI”) substrate. A first opening is formed in a conformal layer overlying a trench isolation region, where the trench isolation region shares an edge with the SOI layer. A dielectric layer then is deposited atop the conformal layer and the trench isolation region, after which a second opening is formed which is aligned with the first opening, the second opening extending through the dielectric layer to expose the bulk semiconductor region. Finally, the conductive via is formed in the second opening.

    摘要翻译: 提供了形成用于接触绝缘体上半导体(“SOI”)衬底的体半导体区域的导电通孔的方法。 第一开口形成在覆盖沟槽隔离区域的共形层中,其中沟槽隔离区域与SOI层共享边缘。 然后在保形层和沟槽隔离区的顶部沉积电介质层,然后形成与第一开口对准的第二开口,第二开口延伸穿过电介质层以暴露体半导体区域。 最后,在第二开口中形成导电通孔。

    Silicon-on-insulator substrate with built-in substrate junction
    3.
    发明授权
    Silicon-on-insulator substrate with built-in substrate junction 有权
    具有内置衬底结的绝缘体上硅衬底

    公开(公告)号:US08482009B2

    公开(公告)日:2013-07-09

    申请号:US13093034

    申请日:2011-04-25

    IPC分类号: H01L29/786

    摘要: A method of forming a SOI substrate, diodes in the SOI substrate and electronic devices in the SOI substrate and an electronic device formed using the SOI substrate. The method of forming the SOI substrate includes forming an oxide layer on a silicon first substrate; ion-implanting hydrogen through the oxide layer into the first substrate, to form a fracture zone in the substrate; forming a doped dielectric bonding layer on a silicon second substrate; bonding a top surface of the bonding layer to a top surface of the oxide layer; thinning the first substrate by thermal cleaving of the first substrate along the fracture zone to form a silicon layer on the oxide layer to formed a bonded substrate; and heating the bonded substrate to drive dopant from the bonding layer into the second substrate to form a doped layer in the second substrate adjacent to the bonding layer.

    摘要翻译: 形成SOI衬底的方法,SOI衬底中的二极管和SOI衬底中的电子器件以及使用SOI衬底形成的电子器件。 形成SOI衬底的方法包括在硅第一衬底上形成氧化层; 将氢离子注入到氧化物层进入第一衬底中,以在衬底中形成断裂区; 在硅第二衬底上形成掺杂的电介质结合层; 将所述结合层的顶表面结合到所述氧化物层的顶表面; 通过沿着断裂区域热裂解第一基板来使第一基板变薄,以在氧化物层上形成硅层以形成键合的基片; 以及加热所述键合衬底以将掺杂剂从所述接合层驱动到所述第二衬底中,以在与所述接合层相邻的所述第二衬底中形成掺杂层。

    Strained ultra-thin SOI transistor formed by replacement gate
    5.
    发明授权
    Strained ultra-thin SOI transistor formed by replacement gate 有权
    应变超薄SOI晶体管由替代栅极组成

    公开(公告)号:US07955909B2

    公开(公告)日:2011-06-07

    申请号:US12057443

    申请日:2008-03-28

    IPC分类号: H01L21/00 H01L21/338

    摘要: A semiconductor structure is described. The structure includes a transistor formed in a semiconductor substrate, the semiconductor substrate having a semiconductor-on-insulator (SOI) layer; a channel associated with the transistor and formed on a first portion of the SOI layer; and a source/drain region associated with the transistor and formed in a second portion of the SOI layer and in a recess at each end of the channel, where the second portion of the SOI layer is substantially thicker than the first portion of the SOI layer. A method of fabricating the semiconductor structure is also described. The method includes forming a dummy gate in a semiconductor substrate; performing a SIMOX process to form a SOI layer such that a first portion of the SOI layer under the dummy gate is substantially thinner than a second portion of the SOI layer; forming a source/drain extension in the SOI layer; and recessing the source/drain extension for forming a source/drain region; epitaxially growing the second portion of the SOI layer; forming an insulating layer over the epitaxial growth; removing the dummy gate for forming a gate opening; and filling the gate opening with a gate dielectric material and a gate conductor material.

    摘要翻译: 描述半导体结构。 该结构包括形成在半导体衬底中的晶体管,该半导体衬底具有绝缘体上半导体层(SOI)层; 与所述晶体管相关并形成在所述SOI层的第一部分上的沟道; 以及与所述晶体管相关并形成在所述SOI层的第二部分中以及在所述沟道的每个端部处的凹部中的源极/漏极区域,其中所述SOI层的所述第二部分基本上比所述SOI层的第一部分更厚 。 还描述了制造半导体结构的方法。 该方法包括在半导体衬底中形成虚拟栅极; 执行SIMOX处理以形成SOI层,使得所述伪栅极之下的所述SOI层的第一部分实质上薄于所述SOI层的第二部分; 在SOI层中形成源/漏扩展; 并且凹入用于形成源极/漏极区域的源极/漏极延伸部分; 外延生长SOI层的第二部分; 在外延生长上形成绝缘层; 去除用于形成门开口的虚拟门; 以及用栅极电介质材料和栅极导体材料填充栅极开口。

    FABRICATION OF SOI WITH GETTERING LAYER
    6.
    发明申请
    FABRICATION OF SOI WITH GETTERING LAYER 有权
    具有精密层的SOI的制造

    公开(公告)号:US20090092810A1

    公开(公告)日:2009-04-09

    申请号:US11867235

    申请日:2007-10-04

    IPC分类号: B32B9/04 C30B23/02

    摘要: An SOI substrate has a gettering layer of silicon-germanium (SiGe) with 5-10% Ge, and a thickness of approximately 50-1000 nm. Carbon (C) may be added to SiGe to stabilize the dislocation network. The SOI substrate may be a SIMOX SOI substrate, or a bonded SOI substrate, or a seeded SOI substrate. The gettering layer may disposed under a buried oxide (BOX) layer. The gettering layer may be disposed on a backside of the substrate.

    摘要翻译: SOI衬底具有具有5-10%Ge的硅 - 锗(SiGe)吸收层,并且厚度约为50-1000nm。 碳(C)可以添加到SiGe中以稳定位错网络。 SOI衬底可以是SIMOX SOI衬底,或者键合的SOI衬底或者是接种的SOI衬底。 吸气层可以设置在掩埋氧化物(BOX)层下面。 吸气层可以设置在衬底的背面。

    Control of buried oxide in SIMOX
    7.
    发明授权
    Control of buried oxide in SIMOX 有权
    在SIMOX中控制埋氧化物

    公开(公告)号:US07492008B2

    公开(公告)日:2009-02-17

    申请号:US10896812

    申请日:2004-07-22

    IPC分类号: H01L21/336

    CPC分类号: H01L21/76243

    摘要: A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.

    摘要翻译: 描述了一种用于形成绝缘体上半导体(SOI)衬底的方法,其包括加热衬底,将氧注入加热衬底,冷却衬底,注入冷却衬底和退火的步骤。 植入的步骤可以是几种能量以提供多个深度和相应的埋入损伤区域。 在植入之前,可以执行清洁衬底表面和/或在其上形成图案化掩模的步骤。 本发明克服了提高掩埋氧化物质量及其性能如表面粗糙度,均匀厚度和击穿电压Vbd的问题。