Packet switching system, packet switching network and packet switching method
    4.
    发明授权
    Packet switching system, packet switching network and packet switching method 失效
    分组交换系统,分组交换网络和分组交换方式

    公开(公告)号:US06275494B1

    公开(公告)日:2001-08-14

    申请号:US09079150

    申请日:1998-05-15

    IPC分类号: H04J316

    摘要: Upon initialization, a VPC is set up between edge nodes. A control processor of each node creates an IP address/VPC mapping table using IP routing information and an address mapping table mapping correspondence between IP addresses and ATM addresses and supplied by a network management system. A gateway assigns a VCC to each packet input to the network. A sending-side edge node inputs the packet to the VPC corresponding to its destination by referring to the IP address/VPC mapping table. A transit node performs packet switching over VP. A receiving-side edge node transfers each packet to the gateway corresponding to its destination. If a series of packets meet a predetermined condition in a given edge node, its control processor sends VCC information to input interfaces of the edge node so that the packets are switched by an ATM switch in the edge node without intervention of the control processor.

    摘要翻译: 在初始化时,在边缘节点之间建立一个VPC。 每个节点的控制处理器使用IP路由信息和地址映射表来映射IP地址和ATM地址之间的对应关系并由网络管理系统提供的IP地址/ VPC映射表。 网关为每个输入到网络的数据包分配一个VCC。 发送侧边缘节点通过参考IP地址/ VPC映射表将分组输入到与其目的地对应的VPC。 传输节点通过VP执行分组交换。 接收侧边缘节点将每个分组传送到与其目的地相对应的网关。 如果一系列分组满足给定边缘节点的预定条件,则其控制处理器向边缘节点的输入接口发送VCC信息,使得分组由边缘节点中的ATM交换机切换,而无需控制处理器的干预。

    Packet switching system, packet switching network and packet switching method
    5.
    发明授权
    Packet switching system, packet switching network and packet switching method 失效
    分组交换系统,分组交换网络和分组交换方式

    公开(公告)号:US07463633B2

    公开(公告)日:2008-12-09

    申请号:US09879953

    申请日:2001-06-14

    IPC分类号: H04L12/28

    摘要: Upon initialization, a VPC is set up between edge nodes. A control processor of each node creates an IP address/VPC mapping table using IP routing information and an address mapping table mapping correspondence between IP addresses and ATM addresses and supplied by a network management system. A gateway assigns a VCC to each packet input to the network. A sending-side edge node inputs the packet to the VPC corresponding to its destination by referring to the IP address/VPC mapping table. A transit node performs packet switching over VP. A receiving-side edge node transfers each packet to the gateway corresponding to its destination. If a series of packets meet a predetermined condition in a given edge node, its control processor sends VCC information to input interfaces of the edge node so that the packets are switched by an ATM switch in the edge node without intervention of the control processor.

    摘要翻译: 在初始化时,在边缘节点之间建立一个VPC。 每个节点的控制处理器使用IP路由信息和地址映射表来映射IP地址和ATM地址之间的对应关系并由网络管理系统提供的IP地址/ VPC映射表。 网关为每个输入到网络的数据包分配一个VCC。 发送侧边缘节点通过参考IP地址/ VPC映射表将分组输入到与其目的地对应的VPC。 传输节点通过VP执行分组交换。 接收侧边缘节点将每个分组传送到与其目的地相对应的网关。 如果一系列分组满足给定边缘节点的预定条件,则其控制处理器向边缘节点的输入接口发送VCC信息,使得分组由边缘节点中的ATM交换机切换,而无需控制处理器的干预。

    Cell output control apparatus and method
    6.
    发明授权
    Cell output control apparatus and method 失效
    单元输出控制装置及方法

    公开(公告)号:US6002668A

    公开(公告)日:1999-12-14

    申请号:US810733

    申请日:1997-03-04

    摘要: The cell output control apparatus includes a cell time slot allotment circuit for allotting, cells to be transmitted, to cell time slots with the cell transmission intervals changed, a first holder circuit for holding the value of ACR (Allowed Cell Rate), a first calculator circuit for calculating the ratio, LCR (Line Cell Rate)/ACR, a quantizer circuit for quantizing the ratio, LCR/ACR and controlling the allotment of cell time slots on the basis of the quantization error produced by the quantization, a counter for counting the values of cell time slots, a second calculator circuit for calculating the cell time slots for cells, and a second holder circuit for holding the calculated results, whereby it is possible to absorb the quantization error produced when the ratio, LCR/ACR is quantized into an integral value.

    摘要翻译: 小区输出控制装置包括:小区时隙分配电路,用于将发送的小区分配给小区发送间隔改变的小区时隙,用于保持ACR(允许小区率)的值的第一保持电路,第一计算器 用于计算比率的电路,LCR(线路单元速率)/ ACR,用于量化比率的量化器电路,LCR / ACR,并且基于由量化产生的量化误差来控制单元时隙的分配,用于计数的计数器 单元时隙的值,用于计算单元的单元格时隙的第二计算器电路和用于保持所计算的结果的第二保持器电路,由此可以吸收当比率LCR / ACR被量化时产生的量化误差 成为一个整体价值。

    Cell output control apparatus and method
    7.
    发明授权
    Cell output control apparatus and method 失效
    单元输出控制装置及方法

    公开(公告)号:US06330227B1

    公开(公告)日:2001-12-11

    申请号:US09382669

    申请日:1999-08-25

    IPC分类号: G06F1100

    摘要: The cell output control apparatus includes a cell time slot allotment circuit for allotting, cells to be transmitted, to cell time slots with the cell transmission intervals changed, a first holder circuit for holding the value of ACR (Allowed Cell Rate), a first calculator circuit for calculating the ratio, LCR (Line Cell Rate)/ACR, a quantizer circuit for quantizing the ratio, LCR/ACR and controlling the allotment of cell time slots on the basis of the quantization error produced by the quantization, a counter for counting the values of cell time slots, a second calculator circuit for calculating the cell time slots for cells, and a second holder circuit for holding the calculated results, whereby it is possible to absorb the quantization error produced when the ratio, LCR/ACR is quantized into an integral value.

    摘要翻译: 小区输出控制装置包括:小区时隙分配电路,用于将发送的小区分配给小区发送间隔改变的小区时隙,用于保持ACR(允许小区率)的值的第一保持电路,第一计算器 用于计算比率的电路,LCR(线路单元速率)/ ACR,用于量化比率的量化器电路,LCR / ACR,并且基于由量化产生的量化误差来控制单元时隙的分配,用于计数的计数器 单元时隙的值,用于计算单元的单元格时隙的第二计算器电路和用于保持所计算的结果的第二保持器电路,由此可以吸收当比率LCR / ACR被量化时产生的量化误差 成为一个整体价值。

    Method for operating ion exchange equipment
    8.
    发明授权
    Method for operating ion exchange equipment 有权
    操作离子交换设备的方法

    公开(公告)号:US08845904B2

    公开(公告)日:2014-09-30

    申请号:US13119348

    申请日:2010-05-10

    IPC分类号: C02F1/42 C02F1/00 C02F1/44

    摘要: A regeneration process in the operating method of the invention includes a first regeneration process, and a second regeneration process after the end of the first regeneration process. In the first regeneration process, a regenerant is distributed at a top of an ion exchange resin bed and simultaneously the regenerant is collected at a bottom of the resin bed, thereby generating a downward flow of the regenerant to regenerate the whole of the resin bed. In the second regeneration process, the regenerant is distributed at a bottom of the ion exchange resin bed and simultaneously the regenerant is collected at a middle of the resin bed, thereby generating an upward flow of the regenerant to regenerate a part of the resin bed.

    摘要翻译: 本发明的操作方法中的再生处理包括第一再生处理和第一再生处理结束后的第二再生处理。 在第一再生方法中,再生剂分布在离子交换树脂床的顶部,同时将再生剂收集在树脂床的底部,从而产生再生剂的向下流动以再生整个树脂床。 在第二再生方法中,再生剂分布在离子交换树脂床的底部,同时在树脂床的中间收集再生剂,从而产生向上流动的再生剂以再生一部分树脂床。

    Driving circuit of laser diode and optical transmission device
    10.
    发明授权
    Driving circuit of laser diode and optical transmission device 失效
    激光二极管和光传输装置的驱动电路

    公开(公告)号:US5675599A

    公开(公告)日:1997-10-07

    申请号:US614029

    申请日:1996-03-12

    IPC分类号: H01S5/042 H01S5/062 H01S3/00

    摘要: An optical transmission device which is used for a short range optical data link or an optical communication system for subscribers and more particularly requires no automatic optical power control minimizes the turn-on delay time of a laser diode and allows unformatted optical signal transmission by fixed level decision receiving system. By applying a fixed-bias electric current which is not more than the electric threshold current value of the laser diode to the laser diode, the turn-on delay time of the laser diode can be minimized, and the extinction level can be lowered by it, and the fixed level decision receiving system can be used, and the optical receiver circuit can be simplified more.

    摘要翻译: 用于短距离光数据链路或用于用户的光通信系统的光传输设备,更具体地,不需要自动光功率控制,使激光二极管的接通延迟时间最小化,并允许无格式的光信号传输固定等级 决策接收系统。 通过向激光二极管施加不大于激光二极管的电阈值电流值的固定偏置电流,可以使激光二极管的接通延迟时间最小化,并且消光电平可以通过其降低 ,并且可以使用固定电平决定接收系统,并且可以更多地简化光接收器电路。