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公开(公告)号:US20080111224A1
公开(公告)日:2008-05-15
申请号:US11790962
申请日:2007-04-30
申请人: Hak-kyoon Byun , Tae-je Cho , Jong-bo Shim , Sang-uk Han
发明人: Hak-kyoon Byun , Tae-je Cho , Jong-bo Shim , Sang-uk Han
CPC分类号: H01L23/3128 , H01L23/12 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48227 , H01L2224/48465 , H01L2224/73215 , H01L2224/73265 , H01L2225/0651 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2225/1094 , H01L2924/00014 , H01L2924/01079 , H01L2924/10253 , H01L2924/14 , H01L2924/15151 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/3511 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: Embodiments of the present invention provide a MSP having an upper and lower package, with a recess opening in the substrate of the upper package. The upper package may also include multiple stacked semiconductor chips. A lower package may include a substrate and at least one semiconductor chip. During assembly, portions of a lower package are placed into the recess opening in the substrate of the upper package. The beneficial result is a two-package MSP assembly with a reduced total height. In addition, the size and pitch of solder balls or other joints between the upper package substrate and the lower package substrate may also be reduced.
摘要翻译: 本发明的实施例提供了具有上和下封装的MSP,在上封装的基板中具有凹口。 上封装还可以包括多个堆叠的半导体芯片。 下封装可以包括基板和至少一个半导体芯片。 在组装期间,下部包装的部分被放置在上部包装的基底中的凹部开口中。 有利的结果是具有降低的总高度的双封装MSP组件。 此外,也可以减小上封装基板和下封装基板之间的焊球或其他接头的尺寸和间距。
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2.
公开(公告)号:US09113545B2
公开(公告)日:2015-08-18
申请号:US13604412
申请日:2012-09-05
申请人: Sang-uk Han , Young-shin Kwon , Kwan-jai Lee , Jae-min Jung , Kyong-soon Cho , Jeong-kyu Ha
发明人: Sang-uk Han , Young-shin Kwon , Kwan-jai Lee , Jae-min Jung , Kyong-soon Cho , Jeong-kyu Ha
CPC分类号: H05K7/00 , H05K1/028 , H05K1/147 , H05K1/189 , H05K3/323 , H05K2201/09036 , H05K2201/10128
摘要: A tape wiring substrate includes a base film having at least one recess in a first surface of the base film and a chip-mounting region on which a semiconductor chip is included on a second surface of the base film. A wiring pattern is formed on the second surface of the base film and is extended to an edge of the chip-mounting region. A protection film covers the wiring pattern.
摘要翻译: 带状布线基板包括在基膜的第一表面中具有至少一个凹部的基膜和在基膜的第二表面上包含半导体芯片的芯片安装区域。 在基膜的第二表面上形成布线图案并延伸到芯片安装区域的边缘。 保护膜覆盖布线图案。
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