-
公开(公告)号：US09818732B2
公开(公告)日：2017-11-14
申请号：US14867806
申请日：2015-09-28
Applicant: Jae-Min Jung , Sang-Uk Han , KwanJai Lee , KyongSoon Cho , Jeong-Kyu Ha
Inventor： Jae-Min Jung , Sang-Uk Han , KwanJai Lee , KyongSoon Cho , Jeong-Kyu Ha
IPC: H01L25/16 , H01L23/498 , H01L51/52 , H01L27/32
CPC classification number: H01L25/167 , H01L23/49827 , H01L23/4985 , H01L27/323 , H01L27/3276 , H01L27/3288 , H01L51/52 , H01L51/524 , H01L2251/5338 , H01L2924/0002 , H01L2924/00
Abstract: Chip-on-film packages and device assemblies including the same may be provided. The device assembly includes a film package including a semiconductor chip, a panel substrate connected to one end of the film package, a display panel disposed on the panel substrate, and a controlling part connected to another end of the film package. The film package includes a film substrate, a first wire disposed on a top surface of the film substrate, and a second wire disposed on a bottom surface of the film substrate.
-
公开(公告)号：US09113545B2
公开(公告)日：2015-08-18
申请号：US13604412
申请日：2012-09-05
Applicant: Sang-uk Han , Young-shin Kwon , Kwan-jai Lee , Jae-min Jung , Kyong-soon Cho , Jeong-kyu Ha
Inventor： Sang-uk Han , Young-shin Kwon , Kwan-jai Lee , Jae-min Jung , Kyong-soon Cho , Jeong-kyu Ha
CPC classification number: H05K7/00 , H05K1/028 , H05K1/147 , H05K1/189 , H05K3/323 , H05K2201/09036 , H05K2201/10128
Abstract: A tape wiring substrate includes a base film having at least one recess in a first surface of the base film and a chip-mounting region on which a semiconductor chip is included on a second surface of the base film. A wiring pattern is formed on the second surface of the base film and is extended to an edge of the chip-mounting region. A protection film covers the wiring pattern.
Abstract translation: 带状布线基板包括在基膜的第一表面中具有至少一个凹部的基膜和在基膜的第二表面上包含半导体芯片的芯片安装区域。 在基膜的第二表面上形成布线图案并延伸到芯片安装区域的边缘。 保护膜覆盖布线图案。
-
3.发明申请Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and elctronic apparatus including the same 有权用于散热构件的胶带，包括散热构件的薄膜型半导体封装的芯片，以及包括该散热构件的电子装置公开(公告)号：US20090273076A1
公开(公告)日：2009-11-05
申请号：US12385731
申请日：2009-04-17
Applicant: Kyong-sei CHOI , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
Inventor： Kyong-sei CHOI , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
IPC: H01L23/498 , H01L23/36
CPC classification number: H01L23/49838 , H01L23/4985 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01079 , H05K1/0203 , H05K1/189 , H05K2201/09109 , H05K2201/1028 , H05K2201/10674 , H05K2203/1581 , H01L2924/00
Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
Abstract translation: 公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间 绝缘基板的底表面和散热部件的顶表面。
-
公开(公告)号：US20130148312A1
公开(公告)日：2013-06-13
申请号：US13604412
申请日：2012-09-05
Applicant: Sang-Uk Han , Young-Shin Kwon , Kwan-Jai Lee , Jae-Min Jung , Kyong-Soon Cho , Jeong-Kyu Ha
Inventor： Sang-Uk Han , Young-Shin Kwon , Kwan-Jai Lee , Jae-Min Jung , Kyong-Soon Cho , Jeong-Kyu Ha
IPC: H05K7/00
CPC classification number: H05K7/00 , H05K1/028 , H05K1/147 , H05K1/189 , H05K3/323 , H05K2201/09036 , H05K2201/10128
Abstract: A tape wiring substrate includes a base film having at least one recess in a first surface of the base film and a chip-mounting region on which a semiconductor chip is included on a second surface of the base film. A wiring pattern is formed on the second surface of the base film and is extended to an edge of the chip-mounting region. A protection film covers the wiring pattern.
Abstract translation: 带状布线基板包括在基膜的第一表面中具有至少一个凹部的基膜和在基膜的第二表面上包含半导体芯片的芯片安装区域。 在基膜的第二表面上形成布线图案并延伸到芯片安装区域的边缘。 保护膜覆盖布线图案。
-
5.发明申请METHODS OF FORMING SEMICONDUCTOR MODULES AND SEMICONDUCTOR MODULES FORMED BY THE SAME 有权形成半导体模块的方法及其形成的半导体模块公开(公告)号：US20130005088A1
公开(公告)日：2013-01-03
申请号：US13531983
申请日：2012-06-25
Applicant: Sang-Uk HAN , Jeong-Kyu Ha , Youngshin Kwon , Seung Hwan Kim , KwanJai Lee
Inventor： Sang-Uk HAN , Jeong-Kyu Ha , Youngshin Kwon , Seung Hwan Kim , KwanJai Lee
IPC: H01L21/78
CPC classification number: H01L21/56 , H01L21/561 , H01L21/6835 , H01L24/13 , H01L24/81 , H01L2221/68327 , H01L2221/68363 , H01L2221/68381 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/81001 , H01L2924/15788 , H01L2924/00014 , H01L2924/00
Abstract: Provided are methods of forming semiconductor modules. The method includes forming a high polymer material layer having an adhesive property on a support substrate, adhering a semiconductor chip to the support substrate using the high polymer material layer, bonding the semiconductor chip adhered to the support substrate to a flexible panel, and removing the support substrate.
Abstract translation: 提供了形成半导体模块的方法。 该方法包括在支撑基板上形成具有粘合性的高分子材料层，使用高分子材料层将半导体芯片粘附到支撑基板上，将附着在支撑基板上的半导体芯片接合到柔性面板上， 支撑基板。
-
Patent Agency Ranking
6.发明申请TAPE FOR HEAT DISSIPATING MEMBER, CHIP ON FILM TYPE SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATING MEMBER, AND ELECTRONIC APPARATUS INCLUDING THE SAME 有权用于散热构件的胶带，薄膜型半导体封装，包括散热构件的芯片，以及包括其的电子设备公开(公告)号：US20110143625A1
公开(公告)日：2011-06-16
申请号：US13033307
申请日：2011-02-23
Applicant: Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
Inventor： Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
IPC: H01J9/00
CPC classification number: H01L23/49838 , H01L23/4985 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01079 , H05K1/0203 , H05K1/189 , H05K2201/09109 , H05K2201/1028 , H05K2201/10674 , H05K2203/1581 , H01L2924/00
Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
Abstract translation: 公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间 绝缘基板的底表面和散热部件的顶表面。
-
7.发明授权Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same 有权用于散热构件的胶带，包括散热构件的薄膜型半导体封装的芯片，以及包括该散热构件的电子设备公开(公告)号：US07915727B2
公开(公告)日：2011-03-29
申请号：US12385731
申请日：2009-04-17
Applicant: Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
Inventor： Kyoung-sei Choi , Byung-seo Kim , Young-jae Joo , Ye-chung Chung , Kyong-soon Cho , Sang-heui Lee , Si-hoon Lee , Sa-yoon Kang , Dae-woo Son , Sang-gui Jo , Jeong-kyu Ha , Young-sang Cho
IPC: H01L23/498 , H01L23/36
CPC classification number: H01L23/49838 , H01L23/4985 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/01079 , H05K1/0203 , H05K1/189 , H05K2201/09109 , H05K2201/1028 , H05K2201/10674 , H05K2203/1581 , H01L2924/00
Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.
Abstract translation: 公开了一种片上胶片（COF）型半导体封装以及使用其的器件。 COF型半导体封装可以包括包括顶表面和底表面的绝缘衬底，绝缘衬底的顶表面上的半导体器件，绝缘衬底的底表面上的散热部件，以及绝缘衬底的至少一个空间 绝缘基板的底表面和散热部件的顶表面。
-
公开(公告)号：US09929083B2
公开(公告)日：2018-03-27
申请号：US15004176
申请日：2016-01-22
Applicant: Jeong-Kyu Ha
Inventor： Jeong-Kyu Ha
IPC: H01L23/13 , H01L23/498
CPC classification number: H01L23/4985 , H01L23/49866 , H01L2224/16225 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor package includes a flexible film substrate including a chip mounting region and a cut-line interposed between an inner region and an outer region of the flexible film substrate, the cut-line partially surrounding the inner region. The semiconductor package further includes first interconnection lines extending in the inner region from a first side of the chip mounting region towards an edge of the inner region of the flexible film substrate, and second interconnection lines extending in the outer region from a second side of the chip mounting region towards an edge of the outer region of the flexible film substrate. The edge of the inner region and the edge of the outer region are located on the first side of the semiconductor chip.
-
公开(公告)号：US20160111299A1
公开(公告)日：2016-04-21
申请号：US14967490
申请日：2015-12-14
Applicant: Jeong-Kyu HA , Youngshin KWON , KwanJai LEE , Jae-Min JUNG , KyongSoon CHO , Sang-Uk HAN
Inventor： Jeong-Kyu HA , Youngshin KWON , KwanJai LEE , Jae-Min JUNG , KyongSoon CHO , Sang-Uk HAN
CPC classification number: H01L21/486 , H01L21/4853 , H01L21/563 , H01L21/78 , H01L23/145 , H01L23/49524 , H01L23/49827 , H01L23/4985 , H01L24/50 , H01L2924/12042 , H05K1/114 , H05K1/115 , H05K1/189 , H05K3/0052 , H05K3/107 , H05K3/42 , H05K2203/1545 , Y10T156/1052 , H01L2924/00
Abstract: A tape film package is provided including an insulating pattern; a via contact in a via hole in the insulating pattern; first interconnection patterns extending from the via contact to a cutting surface of the insulating pattern; and second interconnection patterns connected to the via contact below the insulating pattern. The second interconnection patterns are parallel to the first interconnection patterns and spaced apart from the cutting surface of the insulating pattern.
Abstract translation: 提供包括绝缘图案的胶带包装; 绝缘图案中的通孔中的通孔接触; 从所述通孔接触延伸到所述绝缘图案的切割表面的第一互连图案; 以及连接到绝缘图案下方的通孔接点的第二互连图案。 第二互连图案平行于第一互连图案并与绝缘图案的切割表面间隔开。
-
公开(公告)号：US20160020196A1
公开(公告)日：2016-01-21
申请号：US14867806
申请日：2015-09-28
Applicant: Jae-Min JUNG , Sang-Uk Han , KwanJai Lee , KyongSoon Cho , Jeong-Kyu Ha
Inventor： Jae-Min JUNG , Sang-Uk Han , KwanJai Lee , KyongSoon Cho , Jeong-Kyu Ha
IPC: H01L25/16 , H01L23/498 , H01L51/52 , H01L27/32
CPC classification number: H01L25/167 , H01L23/49827 , H01L23/4985 , H01L27/323 , H01L27/3276 , H01L27/3288 , H01L51/52 , H01L51/524 , H01L2251/5338 , H01L2924/0002 , H01L2924/00
Abstract: Chip-on-film packages and device assemblies including the same may be provided. The device assembly includes a film package including a semiconductor chip, a panel substrate connected to one end of the film package, a display panel disposed on the panel substrate, and a controlling part connected to another end of the film package. The film package includes a film substrate, a first wire disposed on a top surface of the film substrate, and a second wire disposed on a bottom surface of the film substrate.
-
-
-
-
-
-
-
-
-
Search Results
14
records
(took 0.014 seconds)
