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公开(公告)号:US20120080791A1
公开(公告)日:2012-04-05
申请号:US12894190
申请日:2010-09-30
申请人: Hans-Joachim BARTH , Gottfried BEER , Joern PLAGMANN , Jens POHL , Werner ROBL , Rainer STEINER , Mathias VAUPEL
发明人: Hans-Joachim BARTH , Gottfried BEER , Joern PLAGMANN , Jens POHL , Werner ROBL , Rainer STEINER , Mathias VAUPEL
IPC分类号: H01L23/532 , H01L21/768
CPC分类号: H01L23/53238 , H01L21/76846 , H01L21/76865 , H01L21/76873 , H01L21/76879 , H01L21/76885 , H01L23/53223 , H01L23/53252 , H01L23/53266 , H01L2924/0002 , H01L2924/00
摘要: One or more embodiments relate to a method of forming an electronic device, comprising: providing a workpiece; forming a first barrier layer over the workpiece; forming an intermediate conductive layer over the first barrier layer; forming a second barrier layer over the intermediate conductive layer; forming a seed layer over the second barrier layer; removing a portion of the seed layer to leave a remaining portion of the seed layer and to expose a portion of the second barrier layer; and electroplating a fill layer on the remaining portion of the seed layer.
摘要翻译: 一个或多个实施例涉及一种形成电子设备的方法,包括:提供工件; 在工件上形成第一阻挡层; 在所述第一阻挡层上形成中间导电层; 在所述中间导电层上形成第二阻挡层; 在所述第二阻挡层上形成种子层; 去除种子层的一部分以留下种子层的剩余部分并暴露第二阻挡层的一部分; 并在种子层的剩余部分上电镀填充层。
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公开(公告)号:US20120074574A1
公开(公告)日:2012-03-29
申请号:US12893009
申请日:2010-09-29
申请人: Hans-Joachim BARTH , Gottfried BEER , Joern PLAGMANN , Jens POHL , Werner ROBL , Rainer STEINER , Mathias VAUPEL
发明人: Hans-Joachim BARTH , Gottfried BEER , Joern PLAGMANN , Jens POHL , Werner ROBL , Rainer STEINER , Mathias VAUPEL
IPC分类号: H01L21/768 , H01L23/532
CPC分类号: H01L21/76843 , H01L21/76807 , H01L21/76879 , H01L23/49816 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L24/03 , H01L24/10 , H01L24/13 , H01L2224/0401 , H01L2224/13 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01037 , H01L2924/01042 , H01L2924/01044 , H01L2924/01047 , H01L2924/0105 , H01L2924/0106 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/15788 , H01L2924/00
摘要: One or more embodiments relate to a method of forming a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a seed layer over the barrier layer; forming an inhibitor layer over the seed layer; removing a portion of said inhibitor layer to expose a portion of the seed layer; and selectively depositing a fill layer on the exposed seed layer.
摘要翻译: 一个或多个实施例涉及一种形成半导体结构的方法,包括:提供工件; 在工件上形成阻挡层; 在阻挡层上形成种子层; 在种子层上形成抑制层; 去除所述抑制剂层的一部分以暴露所述种子层的一部分; 并且在曝光的种子层上选择性地沉积填充层。
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3.
公开(公告)号:US20120049375A1
公开(公告)日:2012-03-01
申请号:US12871939
申请日:2010-08-31
申请人: Thorsten MEYER , Gottfried BEER , Christian GEISSLER , Thomas ORT , Klaus PRESSEL , Bernd WAIDHAS , Andreas WOLTER
发明人: Thorsten MEYER , Gottfried BEER , Christian GEISSLER , Thomas ORT , Klaus PRESSEL , Bernd WAIDHAS , Andreas WOLTER
IPC分类号: H01L23/48 , H01L21/768
CPC分类号: H01L23/5389 , H01L21/568 , H01L24/05 , H01L24/24 , H01L24/82 , H01L24/96 , H01L25/0655 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/05547 , H01L2224/05554 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/12105 , H01L2224/24137 , H01L2224/24195 , H01L2924/01005 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1461 , H01L2924/15787 , H01L2924/18162 , H01L2924/00
摘要: A method and a system for routing electrical connections of a plurality of chips are disclosed. In one embodiment, a semiconductor device is provided comprising at least one semiconductor chip, at least one routing plane comprising at least one routing line, and at least one connecting line electrically coupled to the at least one routing line and at least one semiconductor chip.
摘要翻译: 公开了一种用于路由多个芯片的电连接的方法和系统。 在一个实施例中,提供半导体器件,其包括至少一个半导体芯片,包括至少一个布线线的至少一个布线平面以及电耦合到所述至少一个布线线和至少一个半导体芯片的至少一个连接线。
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