公开(公告)号：US20050046489A1

公开(公告)日：2005-03-03

申请号：US10650396

申请日：2003-08-28

申请人： Hayden Cranford ,  Stacy Garvin ,  Vernon Norman ,  Todd Rasmus ,  Peter Seidel

发明人： Hayden Cranford ,  Stacy Garvin ,  Vernon Norman ,  Todd Rasmus ,  Peter Seidel

IPC分类号： H03L7/08 ,  H03L7/00

CPC分类号： H03L7/08 ,  H03L2207/06

摘要： A self-adaptive voltage regulator for a phase-locked loop is disclosed. The phase-locked loop includes a phase detector, a charge pump, a low pass filter, and a voltage control oscillator, wherein the low pass filter inputs a control voltage to a voltage controlled oscillator for generation of an output clock. According to the method and system disclosed herein, the self-adaptive voltage regulator is coupled to an output of the low pass filter for sensing the control voltage during normal operation of the phase-locked loop, and for dynamically adjusting the supply voltage, which is input to the voltage controlled oscillator in response to the control voltage, such that the phase-locked loop maintains the control voltage within a predefined range of a reference voltage.

摘要翻译： 公开了一种用于锁相环的自适应电压调节器。 锁相环包括相位检测器，电荷泵，低通滤波器和压控振荡器，其中低通滤波器将控制电压输入到压控振荡器以产生输出时钟。 根据本文公开的方法和系统，自适应电压调节器耦合到低通滤波器的输出，用于在锁相环的正常操作期间感测控制电压，并且用于动态调整供电电压，即 响应于控制电压输入到压控振荡器，使得锁相环将控制电压保持在参考电压的预定范围内。

公开(公告)号：US20050077936A1

公开(公告)日：2005-04-14

申请号：US10685022

申请日：2003-10-14

申请人： Hayden Cranford ,  Stacy Garvin ,  Vernon Norman ,  Todd Rasmus

发明人： Hayden Cranford ,  Stacy Garvin ,  Vernon Norman ,  Todd Rasmus

IPC分类号： H03L7/10 ,  H03L7/00

CPC分类号： H03L7/10

摘要： Aspects for reducing jitter in a PLL of a high speed serial link are described. The aspects include examining at least one parameter related to performance of a voltage controlled oscillator (VCO) in the PLL, and controlling adjustment of a supply voltage to the VCO based on the examining. A regulator control circuit performs the examining and controlling.

摘要翻译： 描述了降低高速串行链路的PLL抖动的方面。 这些方面包括检查与PLL中的压控振荡器（VCO）的性能有关的至少一个参数，以及基于检查来控制对VCO的电源电压的调节。 调节器控制电路进行检查和控制。

公开(公告)号：US20070096792A1

公开(公告)日：2007-05-03

申请号：US11263008

申请日：2005-10-31

申请人： Hayden Cranford ,  Stacy Garvin ,  Todd Rasmus

发明人： Hayden Cranford ,  Stacy Garvin ,  Todd Rasmus

IPC分类号： H03K17/00

CPC分类号： H03K17/161 ,  H03K2217/0018

摘要： A circuit device having a transistor-based switch topology that substantially eliminates the possibility of latchup of the device. A series-connected low voltage threshold (LVT) N-channel transistor and a pull-up resistor are coupled across a switching (P-channel) transistor so that an integral body connection is provided for the switching transistor, which connects the body of the switching transistor to a node between the pull-up resistor and source terminal of the LVT transistor. The LVT transistor is connected with its gate and drain terminal connected to the output terminal of the switching transistor. The resistor is connected at its other end to the power supply side terminal of the switching transistor. The addition of these components in the particular configuration allows the body connection of the switching transistor to be automatically switched to the highest potential diffusion node.

公开(公告)号：US20070103186A1

公开(公告)日：2007-05-10

申请号：US11263138

申请日：2005-10-27

申请人： Steven Clements ,  William Cornwell ,  Carrie Cox ,  Hayden Cranford ,  Todd Rasmus

发明人： Steven Clements ,  William Cornwell ,  Carrie Cox ,  Hayden Cranford ,  Todd Rasmus

IPC分类号： H03K19/003

CPC分类号： H03K17/164 ,  H03K19/018585 ,  H04L25/0272 ,  H04L25/0278 ,  H04L25/028

摘要： A circuit design method and transmitter that enables flexible control of amplitude, pre- emphasis, and slew rate utilizing a design of a segmented self-series terminated (SSST) transmitter having a parallel configuration of multiple, individually controllable segments of dual pull-up and pull-down transistors. Amplitude control, slew rate control and pre-emphasis control are enabled by manipulation/selection of normal or inverted inputs for the various segments. Also provided is a mechanism for providing/maintaining accurate output across a self-series terminated (SST) transmitter by regulating the supply voltage. Regulation of the supply voltage allows compatibility with conventional serial link receiver termination voltages and protects the transmitter output devices when those voltages are larger than the normal supply for the devices.

摘要翻译： 一种电路设计方法和发射机，其利用具有双重上拉的多个单独可控段的并行配置的分段自串行终端（SSST）发射机的设计来灵活地控制幅度，预加重和转换速率，以及 下拉晶体管。 幅度控制，转换速率控制和预加重控制可以通过操作/选择各个段的正常或反相输入来实现。 还提供了一种用于通过调节电源电压来提供/保持跨越自串式端接（SST）发射器的精确输出的机构。 电源电压的调节允许与传统的串行链路接收器终端电压兼容，并在这些电压大于设备的正常供电时保护发射机输出设备。

公开(公告)号：US20060238184A1

公开(公告)日：2006-10-26

申请号：US11115913

申请日：2005-04-26

申请人： Todd Rasmus

发明人： Todd Rasmus

IPC分类号： G05F3/16

CPC分类号： G05F3/30

摘要： An improved bandgap reference generation circuit utilizes two feedback loops to maintain the voltage at across the current sources to be essentially the same, such that the reference voltage remains constant over variations in process, temperature, and supply voltage. The accuracy of the reference voltage is maintained even at low supply voltages. Furthermore, the feedback loops increase the output impedance of the current sources, reducing the amount of noise coupling from the power supply, improving power supply rejection ratio.

摘要翻译： 改进的带隙参考产生电路利用两个反馈回路来将电流源两端的电压保持为基本相同，使得参考电压在工艺，温度和电源电压变化上保持恒定。 即使在低电源电压下，也保持参考电压的精度。 此外，反馈环路增加了电流源的输出阻抗，减少了电源的噪声耦合量，提高了电源抑制比。

公开(公告)号：US20080067992A1

公开(公告)日：2008-03-20

申请号：US11940771

申请日：2007-11-15

申请人： Todd Rasmus

发明人： Todd Rasmus

IPC分类号： G05F1/00

CPC分类号： G05F1/575 ,  Y10S323/901

摘要： An electrical circuit that provides accurate, regulated output voltage over a wide range of input voltages, while exhibiting each of three desired characteristics: accuracy across different supply/process/temperature; stability and linearity yielding phase/gain margins; and high (good) power supply rejection ratio (PSRR). The circuit comprises an output node having a load current and an amplifier having a first input coupled to a reference voltage and receiving a bias input current that is a pre-established proportionate size of the load current across the output node, such that a change in the load current results in a proportionate change in the bias input current. The electrical circuit represents a voltage regulator that provides accurate, linear output voltage that is a predictable portion of the reference voltage.

摘要翻译： 一种电路，可在宽范围的输入电压范围内提供精确的稳压输出电压，同时具有三种所需特性：不同电源/工艺/温度下的精度; 稳定性和线性度产生相位/增益裕度; 和高（良好）电源抑制比（PSRR）。 该电路包括具有负载电流的输出节点和具有耦合到参考电压的第一输入的放大器，并且接收偏置输入电流，该偏置输入电流是跨输出节点的负载电流的预先确定的比例尺寸，使得 负载电流导致偏置输入电流成比例的变化。 电路表示一个电压调节器，它提供准确的线性输出电压，这是参考电压的可预测部分。

公开(公告)号：US20070096702A1

公开(公告)日：2007-05-03

申请号：US11263139

申请日：2005-10-27

申请人： Todd Rasmus

发明人： Todd Rasmus

IPC分类号： G05F1/00

CPC分类号： G05F1/575 ,  Y10S323/901

摘要： An electrical circuit that provides accurate, regulated output voltage over a wide range of input voltages, while exhibiting each of three desired characteristics: accuracy across different supply/process/temperature; stability and linearity yielding phase/gain margins; and high (good) power supply rejection ratio (PSRR). The circuit comprises an output node having a load current and an amplifier having a first input coupled to a reference voltage and receiving a bias input current that is a pre-established proportionate size of the load current across the output node, such that a change in the load current results in a proportionate change in the bias input current. The electrical circuit represents a voltage regulator that provides accurate, linear output voltage that is a predictable portion of the reference voltage.

摘要翻译： 一种电路，可在宽范围的输入电压范围内提供精确的稳压输出电压，同时具有三种所需特性：不同电源/工艺/温度下的精度; 稳定性和线性度产生相位/增益裕度; 和高（良好）电源抑制比（PSRR）。 该电路包括具有负载电流的输出节点和具有耦合到参考电压的第一输入的放大器，并且接收偏置输入电流，该偏置输入电流是跨输出节点的负载电流的预先确定的比例尺寸，使得 负载电流导致偏置输入电流成比例的变化。 电路表示一个电压调节器，它提供准确的线性输出电压，这是参考电压的可预测部分。