Abstract:
A conflict resolution technique provides consistency such that all conflicts can be detected by at least one of the conflicting requestors if each node monitors all requests after that node has made its own request. If a line is in the Exclusive, Modified or Forward state, conflicts are resolved at the node holding the unique copy. The winner of the conflict resolution, and possibly the losers, report the conflict to the home node, which pairs conflict reports and issues forwarding instructions to assure that all requesting nodes eventually receive the requested data. If a requested cache line is either uncached or present only in the Shared state, the home node provides a copy of the cache node and resolves conflicts. In one embodiment, a blackout period after all responses until an acknowledgement message has been received allows all conflicting nodes to be aware of conflicts in which they are involved.
Abstract:
Use of an import cache and/or an export directory with an agent within to respond to requests for data. The import cache stores data that has been imported through the agent. The export directory stores information related to data that has been exported through the agent. Because the import cache and the export directory only store data that has passed through the agent, not all data transferred within a system are tracked by a single import cache or export directory.
Abstract:
The cache coherency protocol described herein can be used to maintain a virtual model of a system, where the virtual model does not change as the system configuration changes. In general, the virtual model is based on the assumption that each node in the system can directly communicate with some number of other nodes in the system. In one embodiment, for each cache line, the address of the cache line is used to designate a node as the “home” node and all other nodes as “peer” nodes. The protocol specifies one set of messages for communication with the line's home node and another set of messages for communication with the line's peer nodes.
Abstract:
The cache coherency protocol described herein can be used to maintain a virtual model of a system, where the virtual model does not change as the system configuration changes. In general, the virtual model is based on the assumption that each node in the system can directly communicate with some number of other nodes in the system. In one embodiment, for each cache line, the address of the cache line is used to designate a node as the “home” node and all other nodes as “peer” nodes. The protocol specifies one set of messages for communication with the line's home node and another set of messages for communication with the line's peer nodes.
Abstract:
A case erector is provided which is easily adaptable to different sizes and shaped of R.S.C. cases and the like. The case erector includes a case erector system including a pair of vacuum heads, the range and motion of each being actuated by linear servos. A first vacuum head travels in a longitudinal direction relative to the flow of cases through the case erector. A second vacuum head travels in a direction transverse to the flow of cases through the case erector. The action of the pair of vacuum heads and the motion thereof erects or expands the cases.
Abstract:
A method and circuit for preventing external access to secure data of an integrated circuit while supporting DFT is disclosed. In accordance with the method the integrated circuit is automatically placed into the test mode at integrated circuit power-up from a power-down state. At power up, secure data is other than present within a secure data-path of the integrated circuit. Access is provided to the secure data path via a second data path coupled with the first secure data-path. Via the access path, data other than secure data is provided to the integrated circuit, the data for performing test functions of the integrated circuit operating in the test mode. Once data other than secure data is provided to first secure data path, the test mode is terminated and access via other than the secure ports is disabled. The test mode is only re-entered by powering down the integrated circuit and re-initialising it.
Abstract:
A method of providing cipher data during a period of time when output of a primary source of cipher data is unavailable is disclosed. The method comprises switching from a primary source of cipher data to an alternate source of cipher data at a beginning of the period of time; using the cipher data from the alternate source during the period of time; and switching back to the primary source at an end of the period of time.
Abstract:
One embodiment of the present invention provides a system that facilitates avoiding locks by speculatively executing critical sections of code. During operation, the system allows a process to speculatively execute a critical section of code within a program without first acquiring a lock associated with the critical section. If the process subsequently completes the critical section without encountering an interfering data access from another process, the system commits changes made during the speculative execution, and resumes normal non-speculative execution of the program past the critical section. Otherwise, if an interfering data access from another process is encountered during execution of the critical section, the system discards changes made during the speculative execution, and attempts to re-execute the critical section.
Abstract:
A method of providing cipher data during a period of time when output of a primary source of cipher data is unavailable is disclosed. The method comprises switching from a primary source of cipher data to an alternate source of cipher data at a beginning of the period of time; using the cipher data from the alternate source during the period of time; and switching back to the primary source at an end of the period of time.
Abstract:
A flaps closing apparatus for closing full flap boxes is provided. The apparatus includes a flaps closing assembly with a first brake mechanism and closing bars with a second brake mechanism. The first brake mechanism controls the vertical motion of the flaps closing assembly with respect to the flaps closing apparatus. The second brake mechanism holds the closing bars in an angled configuration and at a first predetermined vertical position permits the bars to pivot to a horizontal configuration. A flap sealing assembly includes a pair of compression plates positioned outside the flaps closing assembly. A compression plate actuating mechanism draws the compression plates inwardly to urge side flaps of the full flap box into contact with sides of the full flap box at a second predetermined vertical position. A vertical movement mechanism lowers and raises the apparatus.