公开(公告)号：US10216659B2

公开(公告)日：2019-02-26

申请号：US15314605

申请日：2014-05-30

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Jim W Brainard ,  Hubert E Brinkmann, Jr. ,  Kevin T Lim ,  Mitchel E Wright ,  Raghavan V Venugopal ,  Reza M Bacchus

IPC: G06F13/00 ,  G06F13/16 ,  G11C5/04 ,  G06F13/40 ,  G11C29/04 ,  G06F17/50

Abstract: An example system includes a memory controller; a memory bus coupled to the memory controller; and a dual inline memory module (DIMM) coupled to the memory controller through the memory bus. The DIMM includes a dynamic random access memory (DRAM) portion; a storage portion; and a gate array portion coupled to the memory bus to detect memory access signals and to store information related to the memory access signals on the storage portion.

公开(公告)号：US10664034B2

公开(公告)日：2020-05-26

申请号：US15119811

申请日：2014-04-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Hai Ngoc Nguyen ,  Han Wang ,  Patrick A Raymond ,  Raghavan V Venugopal

IPC: G06F1/30 ,  G06F1/26

Abstract: Examples herein disclose receiving a communication indicating a number of loads supported by multiple nodes and determining an amount of power available at a backup power source. Based on the determination of the amount of power, the examples disclose delivering power to the multiple nodes from the backup power source.

公开(公告)号：US09966678B2

公开(公告)日：2018-05-08

申请号：US15329474

申请日：2014-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Chin-Lung Chiang ,  Jyun-Jie Wang ,  Meng-Chen Wu ,  Raghavan V Venugopal ,  Patrick Raymond ,  Andrew Potter

IPC: H01R12/00 ,  H01R12/72 ,  H01R12/71 ,  H01R13/24

CPC classification number: H01R12/721 ,  H01R12/716 ,  H01R13/2457

Abstract: A Next Generation Form Factor (NGFF) connector apparatus can include a plurality of upper signal pins and an upper ground (GND) pin that is longer than other upper pins. The NGFF connector apparatus can also include a plurality of lower signal pins and a lower power (PWR) pin that is longer than other lower pins.

公开(公告)号：US20170199831A1

公开(公告)日：2017-07-13

申请号：US15314605

申请日：2014-05-30

Applicant: Hewlett-Packard Enterprise Development LP

Inventor： Jim W. Brainard ,  Hubert E Brinkmann ,  Kevin T Lim ,  Mitchel E Wright ,  Raghavan V Venugopal ,  Reza M Bacchus

IPC: G06F13/16 ,  G06F13/40

CPC classification number: G06F13/1689 ,  G06F13/1694 ,  G06F13/4068 ,  G06F17/5054 ,  G06F2217/14 ,  G11C5/04 ,  G11C2029/0409

Abstract: An example system includes a memory controller; a memory bus coupled to the memory controller; and a dual inline memory module (DIMM) coupled to the memory controller through the memory bus. The DIMM includes a dynamic random access memory (DRAM) portion; a storage portion; and a gate array portion coupled to the memory bus to detect memory access signals and to store information related to the memory access signals on the storage portion.

公开(公告)号：US10193251B2

公开(公告)日：2019-01-29

申请号：US15327727

申请日：2014-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Chin-Lung Chiang ,  Jyun-Jie Wang ,  Andrew Potter ,  Raghavan V Venugopal

IPC: H01R13/50 ,  H01R13/62 ,  H01R12/71 ,  H05K7/14 ,  G06F1/18 ,  H01R12/70

Abstract: A Next Generation Form Factor (NGFF) carrier includes a flat component perpendicularly connected to two flat side components to receive an NGFF module, a bar rotatably connected to the two flat side components, and a number of holds along an interior of the flat component to receive a fastener. The NGFF module is insertable in relation to the flat component when the bar is rotated to a first position and fixed on the flat component when the bar is rotated to a second position.

公开(公告)号：US20160286678A1

公开(公告)日：2016-09-29

申请号：US15033626

申请日：2014-01-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Raghavan V Venugopal ,  Chin-Lung Chiang ,  Patrick A Raymond ,  Chih-Chiang Chen

IPC: H05K7/14 ,  G06F13/40

CPC classification number: H05K7/1439 ,  G06F1/185 ,  G06F13/4068 ,  G06F13/409

Abstract: Devices and methods for engagement of an expansion card (312) with an expansion slot (104) of a printed circuit board (PCB) based connector (102) are described. In one example, an expansion card module (300) includes a card housing (302) to house an expansion card (312). The card housing (302) includes a groove (304) for engaging the card housing (302) with a locking element (202) of a device case housing (200) to mount the expansion card module (300) in the device case housing (200). The expansion card module (300) also includes a module mounted actuator (306) pivotally mounted on the card housing (302) to engage with the locking element (202) for actuating the expansion card module (300) to engage the expansion card (312) with at least one expansion slot (104) of the PCB based connector (102).

Abstract translation: 描述了用于将扩展卡（312）与基于印刷电路板（PCB）的连接器（102）的扩展槽（104）接合的装置和方法。 在一个示例中，扩展卡模块（300）包括容纳扩展卡（312）的卡壳（302）。 卡壳体（302）包括用于将卡壳体（302）与装置壳体壳体（200）的锁定元件（202）接合以将扩展卡模块（300）安装在装置壳体壳体（200）中的凹槽（304） 200）。 扩展卡模块（300）还包括可枢转地安装在卡壳体（302）上的模块安装致动器（306），以与锁定元件（202）啮合，用于致动扩展卡模块（300）以接合扩展卡 ）与PCB基连接器（102）的至少一个扩展槽（104）连接。