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    Reverse blocking type semiconductor device
    4.
    发明授权
    Reverse blocking type semiconductor device 失效
    反向阻挡型半导体器件

    公开(公告)号：US4713679A

    公开(公告)日：1987-12-15

    申请号：US787116

    申请日：1985-10-15

    申请人： Yoshio Terasawa ,  Saburo Oikawa

    发明人： Yoshio Terasawa ,  Saburo Oikawa

    IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L29/36 ,  H01L29/744 ,  H01L29/74 ,  H01L29/80

    CPC分类号： H01L29/744 ,  H01L29/0688 ,  H01L29/0834 ,  H01L29/36

    摘要： A reverse blocking type semiconductor device capable of being rapidly turned off is disclosed in which a semiconductor substrate includes four semiconductor layers in a region sandwiched between a pair of principal surfaces in such a manner that adjacent ones of these layers are different in conductivity type from each other, one outermost layer of the layers is surrounded by the layer adjacent to the one outermost layer, the one outermost layer and the layer adjacent thereto are exposed to one principal surface, a cathode electrode kept in low-resistance contact with one outermost layer, a gate electrode is kept in low-resistance contact with the layer adjacent to the one outermost layer and lies in close proximity to the one outermost layer, an anode electrode is kept in low-resistance contact with the other outermost layer at the other principal surface, and a main operating region of the other outermost layer has an impurity concentration gradient in a direction parallel to the anode electrode.

    摘要翻译： 公开了一种能够快速关闭的反向阻挡型半导体器件，其中半导体衬底在夹在一对主表面之间的区域中包括四个半导体层，使得这些层中的相邻层之间的导电类型不同于每个 另一方面，层的一个最外层被邻近一个最外层的层包围，一个最外层和与其相邻的层暴露于一个主表面，与一个最外层保持低电阻接触的阴极电极， 栅电极与邻近一个最外层的层保持低电阻接触，并且位于一个最外层附近，阳极电极与另一个主表面处的另一个最外层保持低电阻接触 ，另一个最外层的主工作区域在与ano平行的方向上具有杂质浓度梯度 电极。

    Gate turn-off thyristor
    5.
    发明授权
    Gate turn-off thyristor 失效
    门极关断晶闸管

    公开(公告)号：US4626888A

    公开(公告)日：1986-12-02

    申请号：US550586

    申请日：1983-11-10

    申请人： Takahiro Nagano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Akira Horie

    发明人： Takahiro Nagano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Akira Horie

    IPC分类号： H01L29/423 ,  H01L29/74 ,  H01L29/744 ,  H01L23/48

    CPC分类号： H01L29/42308 ,  H01L29/74 ,  H01L29/744

    摘要： In accordance with the present invention, a plurality of strip-shaped emitter layers on the cathode side are radially arranged on one main surface of the semiconductor substrate while forming a plurality of rings. A gate electrode is in ohmic contact with a part of a base layer which surrounds and is adjacent to each of said emitter layers on the cathode side. Between rings formed by said emitter layers on the cathode side, a ring-shaped gate collecting electrode is provided to be connected to said gate electrode. The gate collecting electrode is provided at a position to balance the potential differences produced by gate currents respectively corresponding to inside and outside of said gate collecting electrode.

    摘要翻译： 根据本发明，阴极侧的多个条状发射极层径向地布置在半导体衬底的一个主表面上，同时形成多个环。 栅电极与基极层的一部分欧姆接触，该基极层围绕并邻近阴极侧的每个发射极层。 在由阴极侧上的发射极层形成的环之间，设置有环形栅极集电极，以连接到所述栅电极。 栅极集电极设置在平衡由分别对应于所述栅极集电极的内部和外部的栅极电流产生的电位差的位置。

    Semiconductor device provided with electrically floating control electrode
    6.
    发明授权
    Semiconductor device provided with electrically floating control electrode 失效
    具有电浮动控制电极的半导体装置

    公开(公告)号：US4651189A

    公开(公告)日：1987-03-17

    申请号：US680837

    申请日：1984-12-12

    申请人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Yukimasa Sato ,  Shin Kimura ,  Hiroshi Fukui

    发明人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Yukimasa Sato ,  Shin Kimura ,  Hiroshi Fukui

    IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/167 ,  H01L29/32 ,  H01L29/423 ,  H01L29/744 ,  H01L29/74

    CPC分类号： H01L29/744 ,  H01L29/0804 ,  H01L29/0834 ,  H01L29/0839 ,  H01L29/1004 ,  H01L29/102 ,  H01L29/167 ,  H01L29/32 ,  H01L29/42304 ,  H01L29/42308

    摘要： A gate turn-off thyristor and a transistor are disclosed, each of which comprises: a semiconductor substrate including at least three semiconductor layers between a pair of principal surfaces, adjacent ones of the semiconductor layers being different in conductivity type from each other, a first one of the semiconductor layers being formed of at least one strip-shaped region with a constant width, a second one of the semiconductor layers being exposed to a first principal surface of the semiconductor substrate together with the strip-shaped region; a first main electrode kept in ohmic contact with the strip-shaped region at the first principal surface; a first control electrode kept in ohmic contact with the second semiconductor layer on one side of the strip-shaped region in the direction of the width thereof and connected directly to a control terminal; a second control electrode kept in ohmic contact with the second semiconductor layer on the other side of the strip-shaped region in the direction of the width thereof and connected to the control terminal through the first control electrode and the resistance of the second semiconductor layer between the first control electrode and the second control electrode; a second main electrode kept in ohmic contact with a second principal surface of the semiconductor substrate; and means provided in the semiconductor substrate for accelerating the spatial biasing of a conductive region to the other side of the strip-shaped region in the direction of the width thereof when a current flowing across the semiconductor substrate is cut off, thereby enlarging the area of safety operation.

    摘要翻译： 公开了一种栅极截止晶闸管和晶体管，每个晶体管包括：半导体衬底，其在一对主表面之间包括至少三个半导体层，相邻的半导体层之间的导电类型彼此不同，第一 一个半导体层由至少一个具有恒定宽度的条形区域形成，第二个半导体层与条形区域一起暴露于半导体衬底的第一主表面; 第一主电极与第一主表面处的带状区域欧姆接触; 第一控制电极在带状区域的宽度方向上与第二半导体层保持欧姆接触，并直接连接到控制端子; 第二控制电极在带状区域的另一侧沿其宽度方向与第二半导体层欧姆接触，并且通过第一控制电极连接到控制端子，并且第二控制电极与第二半导体层之间的电阻 所述第一控制电极和所述第二控制电极; 与所述半导体衬底的第二主表面保持欧姆接触的第二主电极; 以及设置在半导体衬底中的装置，用于当切断流过半导体衬底的电流时，在导电区域的宽度方向上将导电区域的空间偏置加速到带状区域的另一侧，从而扩大 安全运行。

    Semiconductor device with floating remote gate turn-off means
    7.
    发明授权
    Semiconductor device with floating remote gate turn-off means 失效
    半导体器件具有浮动远程门极关闭手段

    公开(公告)号：US4646122A

    公开(公告)日：1987-02-24

    申请号：US585606

    申请日：1984-03-02

    申请人： Shin Kimura ,  Hiroshi Fukui ,  Hisao Amano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Takahiro Nagano

    发明人： Shin Kimura ,  Hiroshi Fukui ,  Hisao Amano ,  Tsutomu Yatsuo ,  Saburo Oikawa ,  Takahiro Nagano

    IPC分类号： H01L29/423 ,  H01L29/74

    CPC分类号： H01L29/42304 ,  H01L29/42308

    摘要： A semiconductor device such as a transistor or gate turn-off thyristor provided with a control electrode for improving the current cut-off performance, is disclosed in which an emitter layer of a semiconductor substrate is formed of a plurality of strip-shaped regions, a base layer adjacent to the strip-shaped regions is exposed to one principal surface of the semiconductor substrate together with the strip-shaped regions, one main electrode is provided on each strip-shaped region, first and second control electrodes are provided on the base layer, on one and the other sides of each strip-shaped region viewed in the direction of the width thereof, respectively, the other main electrode is provided on the second principal surface of the semiconductor substrate, and a gate terminal is not connected to the first control electrode but connected to the second control electrode, in order to draw out carriers unequally by the first and second control electrodes at a turn-off period. At the initial stage of turn-off action, carriers are drawn out mainly by the second control terminal, and a conductive region contracts so as to be limited to the first control electrode side. At the final stage of turn-off action, carriers are drawn out considerably by the first control electrode, to complete the turn-off action.

    摘要翻译： 公开了一种半导体器件，例如晶体管或栅极截止晶闸管，其设置有用于提高电流截止性能的控制电极，其中半导体衬底的发射极层由多个条形区域形成， 与带状区域相邻的基底层与条状区域一起暴露于半导体衬底的一个主表面，在每个条形区域上设置一个主电极，在基底层上设置第一和第二控制电极 在从宽度方向观察的每个条形区域的一侧和另一侧上分别设置在该半导体衬底的第二主表面上，另一个主电极没有连接到第一 控制电极，但是连接到第二控制电极，以便在关断周期期间由第一和第二控制电极不相等地引出载流子。 在关断动作的初始阶段，主要由第二控制端子引出载体，并且导电区域收缩以限于第一控制电极侧。 在关断动作的最后阶段，载体被第一控制电极显着地拉出，以完成关断动作。

    Field controlled thyristor with double-diffused source region
    8.
    发明授权
    Field controlled thyristor with double-diffused source region 失效
    具有双扩散源极区域的场控晶闸管

    公开(公告)号：US4514747A

    公开(公告)日：1985-04-30

    申请号：US357594

    申请日：1982-03-12

    申请人： Kenji Miyata ,  Yoshio Terasawa ,  Saburo Oikawa ,  Susumu Murakami ,  Masahiro Okamura

    发明人： Kenji Miyata ,  Yoshio Terasawa ,  Saburo Oikawa ,  Susumu Murakami ,  Masahiro Okamura

    IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/744 ,  H01L29/74

    CPC分类号： H01L29/744 ,  H01L29/0834 ,  H01L29/1066

    摘要： Disclosed is a field controlled thyristor in which a first semiconductor region of N.sup.+ -type, a second semiconductor region of N-type, third semiconductor regions of P-type, a fourth semiconductor region of N.sup.- -type and a fifth semiconductor region of P.sup.+ -type are formed in a semiconductor substrate having two main surfaces, the first, second and third semiconductor regions being exposed in the first main surface and the fifth semiconductor region being exposed in the second main surface; and the third semiconductor regions of P-type are spaced from each other by a predetermined spacing. The third semiconductor regions are connected with surface-exposed semiconductor regions exposed in the first main surface. The impurity concentration in the second semiconductor region decreases from the first semiconductor region toward the third semiconductor region so that a low forward voltage drop can be achieved along with a high reverse blocking voltage. Also disclosed is a method for forming the third semiconductor regions and the surface-exposed semiconductor regions through a diffusion process alone.

    摘要翻译： 公开了一种场控晶闸管，其中N +型的第一半导体区域，N型的第二半导体区域，P型的第三半导体区域，N型的第四半导体区域和P + 型形成在具有两个主表面的半导体衬底中，第一，第二和第三半导体区域暴露在第一主表面中，第五半导体区域暴露在第二主表面中; 并且P型的第三半导体区域彼此隔开预定间隔。 第三半导体区域与暴露在第一主表面中的暴露表面的半导体区域连接。 第二半导体区域中的杂质浓度从第一半导体区域朝向第三半导体区域减小，从而可以实现高反向阻断电压的低正向压降。 还公开了通过单独的扩散处理形成第三半导体区域和表面暴露的半导体区域的方法。

    Semiconductor GTO switching device with radially elongated cathode emitter regions of increasing length
    9.
    发明授权
    Semiconductor GTO switching device with radially elongated cathode emitter regions of increasing length 失效
    半导体GTO开关器件，具有长度增长的放射状细长的阴极发射极区域

    公开(公告)号：US4500903A

    公开(公告)日：1985-02-19

    申请号：US384520

    申请日：1982-06-03

    申请人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Akira Horie

    发明人： Tsutomu Yatsuo ,  Takahiro Nagano ,  Saburo Oikawa ,  Akira Horie

    IPC分类号： H01L29/08 ,  H01L29/74 ,  H01L29/744

    CPC分类号： H01L29/0839 ,  H01L29/74 ,  H01L29/744

    摘要： A gate turn-off thyristor in which a cathode-emitter layer is divided into a plurality of strip-like regions which are radially arrayed on a major surface of a semiconductor substrate in a coaxial multi-ring pattern including a plurality of coaxially arrayed rings. The cathode-emitter strips belonging to a given one of the rings have some radial length. The cathode-emitter strips belonging to the inner ring of a coaxial multi-ring pattern have a smaller radial length than that of the cathode-emitter strips constituting the outer ring. A cathode electrode is contacted to the cathode-emitter strip in low resistance ohmic contact. A gate electrode is ohmic contacted with a low resistance to a cathode-base layer located adjacent to the cathode-emitter strip so as to enclose it. An anode electrode is ohmic contacted with a low resistance to the anode-emitter layer. With the structure of GTO, turn-off operation of unit GTO's each including a cathode-emitter strip is equalized.

    摘要翻译： 一种栅极截止晶闸管，其中阴极 - 发射极层被分成多个条形区域，其以包括多个同轴排列的环的同轴多环图案在半导体衬底的主表面上径向排列。 属于给定一个环的阴极 - 发射极条具有一些径向长度。 属于同轴多环形图案的内环的阴极发射极条的径向长度小于构成外环的阴极 - 发射极条的长度。 阴极电极以低电阻欧姆接触与阴极 - 发射极条接触。 栅电极与位于阴极 - 发射极条附近的阴极 - 基底层的低电阻欧姆接触，以便包围它。 阳极电极与对阳极 - 发射极层的低电阻欧姆接触。 利用GTO的结构，使包括阴极 - 发射极条的单元GTO的关断操作相等。

    Method for manufacturing a semiconductor device utilizing selective epitaxial growth and post heat treating
    10.
    发明授权
    Method for manufacturing a semiconductor device utilizing selective epitaxial growth and post heat treating 失效
    利用选择性外延生长和后热处理制造半导体器件的方法

    公开(公告)号：US4329772A

    公开(公告)日：1982-05-18

    申请号：US134673

    申请日：1980-03-27

    申请人： Saburo Oikawa ,  Susumu Murakami ,  Yoshio Terasawa

    发明人： Saburo Oikawa ,  Susumu Murakami ,  Yoshio Terasawa

    IPC分类号： H01L21/20 ,  H01L29/10 ,  H01L29/739 ,  H01L29/744 ,  H01L29/80 ,  H01L21/223

    CPC分类号： H01L29/7392 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L29/1066 ,  H01L29/744 ,  H01L29/80 ,  Y10S148/026 ,  Y10S148/088

    摘要： Disclosed is an improved method of growing an epitaxial layer preventing auto-doping from a doped region exposed to a surface of a semiconductor substrate. A surface of a semiconductor substrate of one conductivity type is covered with a mask having a predetermined opening. Then, impurity atoms are doped into the substrate through the opening to form a region of the other conductivity type. An epitaxial layer of one conductivity type is deposited over the exposed surface of the substrate with another mask which covers the entire surface of the region and has an area larger than that of the exposed surface of the region. The latter mask prevents auto-doping from the region of the other conductivity type. The process is usable for controlling, for example, channel widths of field effect semiconductor devices uniformly and precisely.

    摘要翻译： 公开了一种生长外延层的改进方法，该外延层防止从暴露于半导体衬底的表面的掺杂区域进行自掺杂。 一种导电类型的半导体衬底的表面被具有预定开口的掩模覆盖。 然后，通过开口将杂质原子掺杂到衬底中以形成另一种导电类型的区域。 一种导电类型的外延层沉积在衬底的暴露表面上，另一个掩模覆盖该区域的整个表面并且具有比该区域的暴露表面大的面积。 后一种掩模阻止了从另一种导电类型的区域的自动掺杂。 该过程可用于均匀且精确地控制场效应半导体器件的通道宽度。