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23 条记录 (耗时 0.033 秒)

    Flexible stent
    2.
    发明授权
    Flexible stent 有权
    柔性支架

    公开(公告)号：US07651524B2

    公开(公告)日：2010-01-26

    申请号：US11905289

    申请日：2007-09-28

    申请人： Yousuke Moriuchi ,  Hideaki Yamashita

    发明人： Yousuke Moriuchi ,  Hideaki Yamashita

    IPC分类号： A61F2/06 ,  A61F2/84 ,  A61F2/86 ,  A61F2/88 ,  A61F2/90 ,  A61F2/92 ,  A61F2/94

    CPC分类号： A61F2/915 ,  A61F2/91 ,  A61F2002/9155 ,  A61F2230/0054

    摘要： A stent to be implanted in an organism includes a plurality of wavy annular members arranged in an axial direction thereof. Each of the wavy annular members has a plurality of one-end side bent portions each having an apex at a one-end side of the stent in the axial direction thereof and a plurality of other-end side bent portions each having an apex at an other-end side of the stent in the axial direction thereof. In the wavy annular members disposed adjacently to each other in the axial direction of the stent the wavy annular members disposed at the one-end side of the stent in the axial direction thereof has a sharing linear portion having a start point at the apex of one of the other-end side bent portions thereof or in the vicinity of the apex and a termination point between the apex of the other-end side bent portion thereof and the apex of one of the one-end side bent portions thereof. The sharing linear portion integrates the adjacent wavy annular members with each other.

    摘要翻译： 植入生物体的支架包括沿其轴向布置的多个波浪形环状构件。 每个波浪形环状构件具有多个一端侧弯曲部分，每个端部侧弯曲部分在支架的轴向方向上的一端侧具有顶点，并且多个另一端侧弯曲部分各自具有顶点 支架的另一端在其轴向方向上。 在沿着支架的轴向彼此相邻设置的波浪形环状构件中，沿着轴向设置在支架的一端侧的波浪状环状构件具有共享直线部， 其另一端弯曲部分中的一个或顶点附近以及其另一端侧弯曲部分的顶点与其一端侧弯曲部分之一的顶点之间的终止点。 共享线性部分将相邻的波浪形环状部件彼此集成。

    Stent
    4.
    发明申请
    Stent 有权
    支架

    公开(公告)号：US20080097587A1

    公开(公告)日：2008-04-24

    申请号：US11905289

    申请日：2007-09-28

    申请人： Yousuke Moriuchi ,  Hideaki Yamashita

    发明人： Yousuke Moriuchi ,  Hideaki Yamashita

    IPC分类号： A61F2/06

    CPC分类号： A61F2/915 ,  A61F2/91 ,  A61F2002/9155 ,  A61F2230/0054

    摘要： A stent to be implanted in an organism includes a plurality of wavy annular members arranged in an axial direction thereof. Each of the wavy annular members has a plurality of one-end side bent portions each having an apex at a one-end side of the stent in the axial direction thereof and a plurality of other-end side bent portions each having an apex at an other-end side of the stent in the axial direction thereof. In the wavy annular members disposed adjacently to each other in the axial direction of the stent the wavy annular members disposed at the one-end side of the stent in the axial direction thereof has a sharing linear portion having a start point at the apex of one of the other-end side bent portions thereof or in the vicinity of the apex and a termination point between the apex of the other-end side bent portion thereof and the apex of one of the one-end side bent portions thereof. The sharing linear portion integrates the adjacent wavy annular members with each other.

    摘要翻译： 植入生物体的支架包括沿其轴向布置的多个波浪形环状构件。 每个波浪形环状构件具有多个一端侧弯曲部分，每个端部侧弯曲部分在支架的轴向方向上的一端侧具有顶点，并且多个另一端侧弯曲部分各自具有顶点 支架的另一端在其轴向方向上。 在支架的轴向上彼此相邻设置的波浪状环状部件中，沿着轴向设置在支架的一端侧的波浪状环状部件具有在顶点处具有起点的共享直线部分 其另一端弯曲部分或顶点附近以及其另一端侧弯曲部分的顶点与其一端侧弯曲部分之一的顶点之间的终止点。 共享线性部分将相邻的波浪形环状部件彼此集成。

    SEMICONDUCTOR RECORDING DEVICE, CONTROL METHOD OF SEMICONDUCTOR RECORDING DEVICE, AND SEMICONDUCTOR RECORDING SYSTEM
    5.
    发明申请
    SEMICONDUCTOR RECORDING DEVICE, CONTROL METHOD OF SEMICONDUCTOR RECORDING DEVICE, AND SEMICONDUCTOR RECORDING SYSTEM 有权
    半导体记录装置，半导体记录装置的控制方法和半导体记录系统

    公开(公告)号：US20110161779A1

    公开(公告)日：2011-06-30

    申请号：US12978766

    申请日：2010-12-27

    申请人： Takeshi OTSUKA ,  Hideaki Yamashita

    发明人： Takeshi OTSUKA ,  Hideaki Yamashita

    IPC分类号： H03M13/09 ,  G06F12/00

    CPC分类号： H03M13/2906 ,  G06F12/0246

    摘要： Included are a flash memory onto which user data and parity data are recorded, an external interface unit which receives a first write command for instructing recording of the user data onto the flash memory, and a block managing unit which manages management information indicating whether parity data is valid or invalid. When the user data related to the first write command received through the external interface unit is recorded onto the flash memory 18, the block managing unit updates the management information so as to indicate that the parity data corresponding to the user data is invalid.

    摘要翻译： 包括用于记录用户数据和奇偶校验数据的闪速存储器，接收用于指示将用户数据记录到闪速存储器上的第一写入命令的外部接口单元，以及管理表示奇偶校验数据的管理信息的块管理单元 有效或无效。 当与通过外部接口单元接收的第一写入命令相关的用户数据被记录在闪存18上时，块管理单元更新管理信息，以指示对应于用户数据的奇偶校验数据无效。

    MEMORY DEVICE AND MEMORY DEVICE CONTROLLER
    6.
    发明申请
    MEMORY DEVICE AND MEMORY DEVICE CONTROLLER 审中-公开
    存储器件和存储器件控制器

    公开(公告)号：US20100268897A1

    公开(公告)日：2010-10-21

    申请号：US12760842

    申请日：2010-04-15

    申请人： Keishi OKAMOTO ,  Takeshi Otsuka ,  Hideaki Yamashita

    发明人： Keishi OKAMOTO ,  Takeshi Otsuka ,  Hideaki Yamashita

    IPC分类号： G06F12/00

    CPC分类号： G06F13/1689

    摘要： A memory device controller interposed between a memory device and a host device includes a data communication unit configured to transfer data to and from the memory device in synchronization with a clock signal. The data communication unit supports a single edge synchronization mode in which data is transferred in synchronization with either one of a rising edge and a falling edge of the clock signal, and a double edge synchronization mode in which data is transferred in synchronization with both the rising edge and the falling edge. The data communication unit transfers data in the double edge synchronization mode when data is transferred by the memory device operating as a bus master.

    摘要翻译： 插入存储器件和主机之间的存储器件控制器包括数据通信单元，被配置为与时钟信号同步地将数据传送到存储器件和从存储器件传送数据。 数据通信单元支持与时钟信号的上升沿和下降沿中的任一个同步地传送数据的单边沿同步模式，以及双边沿同步模式，其中数据与上升沿同步地传送 边缘和下降边缘。 当作为总线主机工作的存储器件传送数据时，数据通信单元以双边沿同步模式传送数据。

    Semiconductor recording device, control method of semiconductor recording device, and semiconductor recording system
    8.
    发明授权
    Semiconductor recording device, control method of semiconductor recording device, and semiconductor recording system 有权
    半导体记录装置，半导体记录装置的控制方法和半导体记录系统

    公开(公告)号：US08762810B2

    公开(公告)日：2014-06-24

    申请号：US12978766

    申请日：2010-12-27

    申请人： Takeshi Otsuka ,  Hideaki Yamashita

    发明人： Takeshi Otsuka ,  Hideaki Yamashita

    IPC分类号： G06F11/00

    CPC分类号： H03M13/2906 ,  G06F12/0246

    摘要： Included are a flash memory onto which user data and parity data are recorded, an external interface unit which receives a first write command for instructing recording of the user data onto the flash memory, and a block managing unit which manages management information indicating whether parity data is valid or invalid. When the user data related to the first write command received through the external interface unit is recorded onto the flash memory 18, the block managing unit updates the management information so as to indicate that the parity data corresponding to the user data is invalid.

    摘要翻译： 包括用于记录用户数据和奇偶校验数据的闪速存储器，接收用于指示将用户数据记录到闪速存储器上的第一写入命令的外部接口单元，以及管理表示奇偶校验数据的管理信息的块管理单元 有效或无效。 当与通过外部接口单元接收的第一写入命令相关的用户数据被记录在闪存18上时，块管理单元更新管理信息，以指示对应于用户数据的奇偶校验数据无效。

    Semiconductor memory device that stores a rewrite frequency of a nonvolatile memory included in the semiconductor memory device
    9.
    发明授权
    Semiconductor memory device that stores a rewrite frequency of a nonvolatile memory included in the semiconductor memory device 有权
    半导体存储器件，其存储包括在半导体存储器件中的非易失性存储器的重写频率

    公开(公告)号：US08566513B2

    公开(公告)日：2013-10-22

    申请号：US13036218

    申请日：2011-02-28

    申请人： Hideaki Yamashita

    发明人： Hideaki Yamashita

    IPC分类号： G06F12/02 ,  G06F17/30

    CPC分类号： G06F12/0246 ,  G06F17/30218 ,  G06F2212/1032 ,  G06F2212/7211

    摘要： A semiconductor memory device that stores information includes: a flash memory that is managed by a predetermined file system having a parameter dependent on the semiconductor memory device; a rewrite frequency storage unit that stores a rewrite frequency of the flash memory; an ID detection unit that detects whether or not first identification information associated with the rewrite frequency is stored in the flash memory as the parameter; and a control unit that, when the ID detection unit detects that the first identification information is stored, reflects the rewrite frequency stored in the rewrite frequency storage unit, on a storage area corresponding to the first identification information.

    摘要翻译： 存储信息的半导体存储器件包括：由具有取决于半导体存储器件的参数的预定文件系统管理的闪速存储器; 重写频率存储单元，其存储闪存的重写频率; ID检测单元，其检测与所述重写频率相关联的第一识别信息是否存储在所述闪速存储器中作为所述参数; 以及控制单元，当所述ID检测单元检测到所述第一识别信息被存储时，将存储在所述重写频率存储单元中的重写频率反映到对应于所述第一识别信息的存储区域上。

    Semiconductor memory device, host device and semiconductor memory system
    10.
    发明授权
    Semiconductor memory device, host device and semiconductor memory system 有权
    半导体存储器件，主机器件和半导体存储器系统

    公开(公告)号：US08352807B2

    公开(公告)日：2013-01-08

    申请号：US12652790

    申请日：2010-01-06

    申请人： Hideaki Yamashita ,  Takeshi Ootsuka

    发明人： Hideaki Yamashita ,  Takeshi Ootsuka

    IPC分类号： G06F11/00

    CPC分类号： G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7202

    摘要： A host device 200A includes a data buffer 250. When data has been already written to a part of a physical block and data is additionally written to the physical block, it is determined whether or not the data written to the physical block is held in the data buffer. When the data is held, data is written to the block, and when an error exists, data in unit of physical blocks is rewritten. When the data is not held in the data buffer, a new physical block is required to be secured and then, data is written to the new block. Thereby, even when power is shut off or an error occurs during writing in the semiconductor memory device, destruction of data already written is prevented.

    摘要翻译： 主机设备200A包括数据缓冲器250.当数据已被写入物理块的一部分并且数据被附加地写入物理块时，确定写入物理块的数据是否被保存在 数据缓冲区。 当数据保持时，将数据写入块，当存在错误时，重写物理块单位的数据。 当数据不保存在数据缓冲器中时，需要新的物理块来保护数据，然后将数据写入新的块。 因此，即使当在半导体存储器件中写入期间断电或出现错误时，也可以防止已经写入的数据的破坏。