Microwave plasma CVD apparatus with a deposition chamber having a
circumferential wall comprising a curved moving substrate web and a
microwave applicator means having a specific dielectric member on the
exterior thereof
    1.
    发明授权
    Microwave plasma CVD apparatus with a deposition chamber having a circumferential wall comprising a curved moving substrate web and a microwave applicator means having a specific dielectric member on the exterior thereof 失效
    具有沉积室的微波等离子体CVD装置,其具有包括弯曲移动衬底腹板的周向壁和在其外部具有特定电介质构件的微波施加器装置

    公开(公告)号:US5514217A

    公开(公告)日:1996-05-07

    申请号:US261655

    申请日:1994-06-07

    摘要: An apparatus for continuously forming a functional deposited film on a continuously moving web member by microwave plasma CVD process, said apparatus comprises: a substantially enclosed columnar film-forming chamber having a curved circumferential wall formed by curving and projecting said web member as said web member is moving in the longitudinal direction by curved portion-forming means, said film-forming chamber having a film-forming space defined by a curved moving web member constituting said circumferential in which plasma is generated; at least a microwave applicator means capable of radiating a microwave energy in the direction of microwave to propagate, said microwave applicator means being mounted to said film forming chamber through one of the two side faces thereof such that part of said microwave applicator means is plunged into said film-forming space, at least said part of microwave applicator means having a dielectric exterior constituted by a dielectric material having a value of 2.times.10.sup.-2 or less in the product of the dielectric constant (.epsilon.) and the dielectric dissipation factor (tan .delta.) with respect to the frequency of microwave used;means for evacuating said film-forming chamber; means for introducing a film-forming raw material gas into said film-forming chamber; and a temperature controlling means.

    摘要翻译: 一种用于通过微波等离子体CVD工艺在连续移动的网状构件上连续地形成功能沉积膜的装置,所述装置包括:基本上封闭的柱状成膜室,具有弯曲周向壁,该弯曲周壁通过弯曲和突出所述腹板构件而形成, 通过弯曲部分形成装置在纵向方向上移动,所述成膜室具有由形成有等离子体的周向的弯曲移动幅材构成的成膜空间; 至少一个能够沿微波方向辐射微波能量以传播的微波施加器装置,所述微波施加器装置通过其两个侧面之一安装到所述成膜室,使得所述微波施加装置的一部分被插入 所述成膜空间,所述微波施加器装置的至少所述部分具有由介电常数(ε)和介电损耗因数(tanδ)的乘积中的介电材料构成的电介质材料,所述电介质外部具有2×10 -2或更小的值 )相对于使用微波的频率; 用于抽出所述成膜室的装置; 用于将成膜原料气体引入所述成膜室的装置; 和温度控制装置。

    MANUFACTURING METHOD FOR POLYCRYSTALLINE SILICON INGOT, AND POLYCRYSTALLINE SILICON INGOT
    8.
    发明申请
    MANUFACTURING METHOD FOR POLYCRYSTALLINE SILICON INGOT, AND POLYCRYSTALLINE SILICON INGOT 审中-公开
    多晶硅和多晶硅的制造方法

    公开(公告)号:US20130028825A1

    公开(公告)日:2013-01-31

    申请号:US13636490

    申请日:2011-03-25

    IPC分类号: C03B5/23 C01B33/02

    摘要: A method for manufacturing a polycrystalline silicon ingot includes: solidifying a silicon melt retained in a crucible unidirectionally upward from a bottom surface of the silicon melt, wherein a silicon nitride coating layer is formed on inner surfaces of side walls and an inner side surface of a bottom of the crucible, a solidification process in the crucible is divided into a first region from 0 mm to X (10 mm≦X

    摘要翻译: 一种多晶硅锭的制造方法,其特征在于,包括:从所述硅熔体的底面单向上固化保持在坩埚中的硅熔体,其中,在侧壁的内表面和 坩埚的底部,坩埚中的凝固过程被高分割成从0到X(10mm和nlE; X <30mm)的第一区域,从X到Y的第二区域(30mm&amp; NlE; Y <100mm) ,Y以上的第三区域以坩埚的底部为基准,第一区域的固化率V1为10mm / h×nlE; V1&lt; ll; 20mm / h,凝固率 第二区域中的V2在1mm / h&lt; lEE; V2&nlE; 5mm / h的范围内。

    Non-volatile memory with two adjacent memory cells sharing same word line
    9.
    发明授权
    Non-volatile memory with two adjacent memory cells sharing same word line 失效
    具有两个相邻存储单元的非易失性存储器共享相同的字线

    公开(公告)号:US07139193B2

    公开(公告)日:2006-11-21

    申请号:US10779683

    申请日:2004-02-18

    申请人: Masahiro Kanai

    发明人: Masahiro Kanai

    IPC分类号: G11C11/34

    摘要: A nonvolatile semiconductor memory device having a small layout size includes a memory cell array in which a plurality of memory cells are arranged in a row direction and a column direction. The memory cell array includes a plurality of element isolation regions. Each of the memory cells includes a source region, a drain region, a channel region located between the source region and the drain region, a select gate and a word gate disposed to face the channel region, and a nonvolatile memory element formed between the word gate and the channel region. A wordline connection section which connects at least one of a plurality of word gate interconnects in an upper layer with at least one of the word gates is disposed over at least one of the element isolation regions.

    摘要翻译: 具有小布局尺寸的非易失性半导体存储器件包括其中多个存储单元沿行方向和列方向布置的存储单元阵列。 存储单元阵列包括多个元件隔离区域。 每个存储单元包括源极区域,漏极区域,位于源极区域和漏极区域之间的沟道区域,设置为面对沟道区域的选择栅极和字栅极以及形成在该单元之间的非易失性存储元件 门和通道区域。 将上层中的多个字门互连中的至少一个与至少一个字栅连接的字线连接部分设置在元件隔离区域中的至少一个上。