公开(公告)号：US06195215B1

公开(公告)日：2001-02-27

申请号：US09124535

申请日：1998-07-29

申请人： Yoshiyuki Yanagimoto ,  Hiroaki Ugawa ,  Atsushi Hattori ,  Nobuhiro Shitara

发明人： Yoshiyuki Yanagimoto ,  Hiroaki Ugawa ,  Atsushi Hattori ,  Nobuhiro Shitara

IPC分类号： G11B502

CPC分类号： G11B20/10203 ,  G11B5/012 ,  G11B27/34 ,  G11B27/36 ,  G11B33/10 ,  G11B2220/20

摘要： The invention is directed toward a measuring apparatus for measuring performance characteristics of a recording unit including a recording medium on which one track is divided into a plurality of sectors. The measuring apparatus includes a writing means for writing a write signal with a write parameter, a first control means for changing the write parameter value for respective sectors, a reading means for reading out the write signal written by the writing means with a read parameter and measuring the read-out write signal as a read signal, and a second control means for controlling the read parameter so as to produce predetermined read parameter values for respective sectors.

摘要翻译： 本发明涉及一种用于测量包括记录介质的记录单元的性能特性的测量装置，其中一个轨道被划分成多个扇区。 该测量装置包括用于写入具有写入参数的写入信号的写入装置，用于改变各个扇区的写入参数值的第一控制装置，读取由写入装置写入的写入信号的读取装置，读取参数， 测量作为读取信号的读出写入信号;以及第二控制装置，用于控制读取参数，以产生相应扇区的预定读取参数值。

公开(公告)号：US5822331A

公开(公告)日：1998-10-13

申请号：US521658

申请日：1995-08-31

申请人： Hiroaki Ugawa ,  Atsushi Hattori

发明人： Hiroaki Ugawa ,  Atsushi Hattori

IPC分类号： G06F11/267 ,  G11B20/18 ,  H03M13/00 ,  G06F11/00

CPC分类号： G06F11/2221 ,  G11B20/182

摘要： A system efficiently determines and stores in memory the logical bit positions of bits in which bit errors have occurred in digital recording devices, etc. The system measures bit errors by comparing a test bit string with a correct bit string, and includes a bit string memory that stores the correct bit string, a word comparator for comparing corresponding words from the test bit string and the correct bit string, an error word content memory that stores the contents of the words containing errors, and an error word position information memory that shows the positions in the correct bit string which correspond to error words in the test bit string that contain the errors. Bit error information in a desired visual format is obtained by performing calculation processing on these memory values.

摘要翻译： 系统有效地确定并存储在数字记录装置等中发生比特错误的比特的逻辑比特位置。该系统通过将测试比特串与正确比特串进行比较来测量比特错误，并且包括比特串存储器 存储正确的位串，用于比较来自测试位串和正确位串的对应字的字比较器，存储包含错误的字的内容的错误字内容存储器，以及显示所述错误字位置信息存储器 位于与包含错误的测试位串中的错误字对应的正确位串中的位置。 通过对这些存储器值执行计算处理，获得所需视觉格式的位错误信息。

公开(公告)号：US5610952A

公开(公告)日：1997-03-11

申请号：US559915

申请日：1995-11-17

申请人： Ken Yamanaka ,  Hiroaki Ugawa

发明人： Ken Yamanaka ,  Hiroaki Ugawa

IPC分类号： G11B20/14 ,  H03L7/08 ,  H04L1/00 ,  H04L7/00 ,  H04L7/033 ,  H04L25/36

CPC分类号： H04L7/033

摘要： A synchronization signal generation device includes a circuit that enables a phase difference between a synchronization signal and an input signal with intermittent edges to be arbitrarily and continuously varied. The synchronization signal generating device is of the second order phase locked loop and has a phase detector with the following elements: a circuit for generating pulses with widths corresponding to the phase difference between the input signal and the synchronization signal only upon occurrence of an edge of the input signal; a circuit for generating pulses with a constant width only upon occurrence of an edge of the input signal or the synchronization signal; a variation circuits which varies one or both of the amplitudes of the aforesaid pulses; and a combining circuit which adds or subtracts the pulses from the variation circuits to derive a phase comparison signal.

摘要翻译： 同步信号产生装置包括使得同步信号和具有间歇边缘的输入信号之间的相位差能够任意且连续变化的电路。 同步信号产生装置是二阶锁相环，具有以下元件的相位检测器：用于产生具有对应于输入信号和同步信号之间的相位差的脉冲的脉冲的电路， 输入信号; 用于仅在出现输入信号或同步信号的边缘时产生具有恒定宽度的脉冲的电路; 变化电路，其改变上述脉冲的一个或两个振幅; 以及组合电路，其对来自变化电路的脉冲进行相加或相减以得出相位比较信号。

公开(公告)号：US06710256B2

公开(公告)日：2004-03-23

申请号：US09957432

申请日：2001-09-20

申请人： Kenichi Kato ,  Hiroaki Ugawa ,  Toshiki Kita

发明人： Kenichi Kato ,  Hiroaki Ugawa ,  Toshiki Kita

IPC分类号： H05K103

CPC分类号： H01R12/62 ,  H01R13/2414 ,  H05K1/0219 ,  H05K3/365 ,  H05K3/368 ,  H05K2201/056 ,  H05K2201/2018

摘要： An apparatus and a method for connecting high-frequency circuit boards, and for providing an electrical connection between respective electrodes of two high-frequency circuit boards includes an electrode connecting member including a bar-shaped member having a predetermined sectional shape, and having connecting electrodes formed on a part of an outer periphery of the bar-shaped member. The connecting electrodes are located so as to provide an inter-connection between the respective electrodes of the two high-frequency circuit boards through the connecting electrodes and to be sandwiched between the respective electrodes thereof. The connecting electrodes are preferably composed of a plurality of electrode lines formed so as to be spaced at a predetermined interval on the outer periphery of the bar-shaped member.

摘要翻译： 一种用于连接高频电路板并且用于在两个高频电路板的各个电极之间提供电连接的装置和方法包括：电极连接构件，其包括具有预定截面形状的棒状构件，并具有连接电极 形成在棒状构件的外周的一部分上。 连接电极被定位成通过连接电极提供两个高频电路板的各个电极之间的相互连接，并且夹在其各自的电极之间。 连接电极优选由在棒状部件的外周隔开规定间隔而形成的多个电极线构成。

公开(公告)号：US20070225927A1

公开(公告)日：2007-09-27

申请号：US11784048

申请日：2007-04-05

申请人： Masaki Bessho ,  Hiroaki Ugawa ,  Junichi Iwai ,  Koji Murata

发明人： Masaki Bessho ,  Hiroaki Ugawa ,  Junichi Iwai ,  Koji Murata

IPC分类号： G06F19/00

CPC分类号： G01R29/26 ,  G01R25/00 ,  H04B3/462

摘要： A method for measuring noise of signals under test by frequency converting the signals under test to generate a first intermediate signals, frequency converting the signals under test to generate a second intermediate signals having frequency different from that of the first intermediate signals, and measuring the noise of signals under test from the first and the second intermediate signals using cross correlation processing or cross spectrum processing. The apparatus measures the phase noise of signals under test using this method.

摘要翻译： 一种通过对所测试信号进行频率转换来测量被测信号的噪声的方法，以产生第一中间信号，对被测信号进行频率转换，以生成具有与第一中间信号频率不同的频率的第二中间信号，并测量噪声 的来自第一和第二中间信号的被测信号使用互相关处理或交叉频谱处理。 该装置使用该方法测量被测信号的相位噪声。

公开(公告)号：US20050238094A1

公开(公告)日：2005-10-27

申请号：US11102263

申请日：2005-04-08

申请人： Masaki Bessho ,  Hiroaki Ugawa

发明人： Masaki Bessho ,  Hiroaki Ugawa

IPC分类号： G01R25/00 ,  G01R23/16 ,  G01R29/02 ,  G01R29/26 ,  H04B3/46

CPC分类号： G01R29/26 ,  G01R25/00 ,  H04B3/462

摘要： A method measuring the phase noise of signals under test by generating first phase signals representing the phase of signals under test using first local signals generated while referring to first reference signals, generating second phase signals representing the phase of signals under test using second local signals generated while referring to second reference signals having a frequency different from that of the first reference signals, and finding the cross correlation or cross spectrum between the first phase signals and second phase signals. The apparatus of the present invention measures the phase noise of signals under test using this method.

摘要翻译： 一种通过使用在参考第一参考信号时产生的第一本地信号产生表示被测信号的相位的第一相位信号来测量被测信号的相位噪声的方法，使用产生的第二本地信号产生表示被测信号的相位的第二相位信号 同时参考具有与第一参考信号的频率不同的频率的第二参考信号，并且找到第一相位信号和第二相位信号之间的互相关或交叉频谱。 本发明的装置使用该方法测量被测信号的相位噪声。