公开(公告)号：US06239004B1

公开(公告)日：2001-05-29

申请号：US09135976

申请日：1998-08-18

申请人： Hiroji Aga ,  Kiyoshi Mitani ,  Masatake Nakano

发明人： Hiroji Aga ,  Kiyoshi Mitani ,  Masatake Nakano

IPC分类号： H01L2130

CPC分类号： H01L21/76251 ,  H01L21/2007

摘要： In a method of fabricating a bonded wafer, an oxide film is first formed on the surface of at least one of two mirror-polished silicon wafers. The two silicon wafers are superposed such that the mirror-polished surfaces come into close contact with each other, and heat treatment is performed in order to join the wafers together firmly. Subsequently, the thickness of one of the wafers is reduced so as to yield a thin film, the surface of which is then polished and subjected to vapor-phase etching in order to make the thickness of the thin film uniform. Optionally, the vapor-phase-etched surface is then mirror-polished. The surface of the bonded wafer is oxidized, and the generated surface oxide film is then removed. In the method, the thickness of the oxide film formed on the surface of the bonded wafer is made not greater than 50 nm. The method reliably eliminates damage and crystal defects generated during etching in accordance with PACE method or subsequent mirror polishing, and thereby enables relatively simple and low cost manufacture of bonded wafers having a very thin SOI layer that has good thickness uniformity and excellent crystallinity.

摘要翻译： 在制造接合晶片的方法中，首先在两个镜面抛光硅晶片中的至少一个的表面上形成氧化膜。 将两个硅晶片叠置成使得镜面抛光表面彼此紧密接触，并且进行热处理以将晶片牢固地接合在一起。 随后，减少一个晶片的厚度，以产生薄膜，然后对其表面进行抛光并进行气相蚀刻，以使薄膜的厚度均匀。 任选地，将气相蚀刻表面进行镜面抛光。 接合晶片的表面被氧化，然后除去生成的表面氧化膜。 在该方法中，形成在接合晶片的表面上的氧化膜的厚度不大于50nm。 该方法可以根据PACE法或随后的镜面抛光可靠地消除蚀刻期间产生的损伤和晶体缺陷，从而能够制造具有良好厚度均匀性和优异结晶度的非常薄的SOI层的接合晶片的相对简单且低成本的制造。

公开(公告)号：US07959731B2

公开(公告)日：2011-06-14

申请号：US11665977

申请日：2005-11-02

申请人： Isao Yokokawa ,  Hiroji Aga ,  Kiyoshi Mitani

发明人： Isao Yokokawa ,  Hiroji Aga ,  Kiyoshi Mitani

IPC分类号： C30B25/22

CPC分类号： H01L21/26506 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/76254 ,  Y10S117/915

摘要： A method for producing a semiconductor wafer, including epitaxially growing a Si1-XGeX layer (0

摘要翻译： 一种制造半导体晶片的方法，包括在硅单晶晶片的表面上外延生长Si1-XGeX层（0

公开(公告)号：US20070054459A1

公开(公告)日：2007-03-08

申请号：US11593009

申请日：2006-11-06

申请人： Hiroji Aga ,  Kiyoshi Mitani

发明人： Hiroji Aga ,  Kiyoshi Mitani

IPC分类号： H01L21/8222

CPC分类号： H01L21/76254

摘要： The present invention provides a SOI wafer produced by an ion implantation delamination method wherein a width of a SOI island region in a terrace portion generated in an edge portion of the SOI wafer where a surface of a base wafer is exposed is narrower than 1 mm and a density of pit-shaped defects having a size of 0.19 μm or more existing in a surface of a SOI layer detected by a LPD inspection is 1 counts/cm2 or less, and also provides a method for producing the SOI wafer. Thereby, there is provided a SOI wafer produced by an ion implantation delamination method wherein generation of SOI islands generated in delamination can be suppressed and a defect density of LPDs existing in a surface of the SOI wafer can be reduced, and a method for producing the same, so that device failure can be reduced.

摘要翻译： 本发明提供一种通过离子注入分层方法制造的SOI晶片，其中在SOI晶片的边缘部分中产生的露台部分中的SOI岛区域的宽度基底晶片暴露的距离窄于1mm， 存在于通过LPD检查检测的SOI层的表面中的具有0.19μm以上的尺寸的凹坑状缺陷的密度为1个/ cm 2以下，并且还提供了一种用于 生产SOI晶片。 因此，提供了通过离子注入分层方法制造的SOI晶片，其中可以抑制在分层中产生的SOI岛的产生，并且可以减少存在于SOI晶片的表面中的LPD的缺陷密度，以及制造 相同，从而可以减少设备故障。

公开(公告)号：US06238990B1

公开(公告)日：2001-05-29

申请号：US09185901

申请日：1998-11-04

申请人： Hiroji Aga ,  Norihiro Kobayashi ,  Kiyoshi Mitani

发明人： Hiroji Aga ,  Norihiro Kobayashi ,  Kiyoshi Mitani

IPC分类号： H02L21336

CPC分类号： H01L21/3226 ,  H01L21/324 ,  H01L21/76256

摘要： A method for heat-treating an SOI wafer in a reducing atmosphere, wherein the SOI wafer is heat-treated through use of a rapid thermal annealer at a temperature within the range of 1100° C. to 1300° C. for 1 sec to 60 sec. The reducing atmosphere is preferably an atmosphere of 100% hydrogen or a mixed gas atmosphere containing hydrogen and argon. The heat treatment is preferably performed for 1 sec to 30 sec. The method eliminates COPs in an SOI layer of an SOI wafer in accordance with a hydrogen annealing method, while preventing etching of the SOI layer and a buried oxide layer.

摘要翻译： 一种用于在还原气氛中对SOI晶片进行热处理的方法，其中通过使用快速热退火炉在1100℃至1300℃的温度范围内对SOI晶片进行热处理1秒至60秒 秒 还原气氛优选为100％氢气或含有氢气和氩气的混合气体气氛。 优选进行1秒〜30秒的热处理。 该方法根据氢退火方法消除SOI晶片的SOI层中的COP，同时防止SOI层和掩埋氧化物层的蚀刻。

公开(公告)号：US5998281A

公开(公告)日：1999-12-07

申请号：US698457

申请日：1996-08-15

申请人： Hiroji Aga ,  Kiyoshi Mitani ,  Masatake Katayama

发明人： Hiroji Aga ,  Kiyoshi Mitani ,  Masatake Katayama

IPC分类号： H01L21/20 ,  H01L21/762

CPC分类号： H01L21/76251 ,  H01L21/2007 ,  Y10S148/012 ,  Y10S438/977

摘要： Proposed is an improvement in the process for the preparation of an SOI wafer comprising the steps of: forming an oxidized surface film on the mirror-polished surface of a first mirror-polished semiconductor silicon wafer as the base wafer; forming a doped layer with a dopant in a high concentration on the mirror-polished surface of a second mirror-polished semiconductor silicon wafer as the bond wafer; bringing the base wafer and the bond wafer into contact each with the other at the oxidized surface film and the doped layer; and subjecting the thus contacted semiconductor silicon wafers to a heat treatment to effect integral bonding thereof into a precursor of an SOI wafer. The improvement of the invention is accomplished by polishing the surface of the doped layer on the bond wafer before the base wafer and the bond wafer are joined by contacting at the oxidized surface film and the doped layer so that a great improvement can be obtained in the bonding strength between layers.

摘要翻译： 提出了制备SOI晶片的方法的改进，包括以下步骤：在作为基底晶片的第一镜面抛光半导体硅晶片的镜面抛光表面上形成氧化的表面膜; 在作为接合晶片的第二镜面抛光半导体硅晶片的镜面抛光表面上形成具有高浓度掺杂剂的掺杂层; 使基底晶片和接合晶片在氧化的表面膜和掺杂层处彼此接触; 以及对这样接触的半导体硅晶片进行热处理以使其整体结合到SOI晶片的前体中。 通过在基底晶片和接合晶片通过在氧化的表面膜和掺杂层之间接触而接合基底晶片和接合晶片之前，通过抛光接合晶片上的掺杂层的表面来实现本发明的改进，使得可以在 层之间的粘结强度。

公开(公告)号：US20060185581A1

公开(公告)日：2006-08-24

申请号：US11353046

申请日：2006-02-14

申请人： Hiroji Aga ,  Nobuhiko Noto ,  Kiyoshi Mitani

发明人： Hiroji Aga ,  Nobuhiko Noto ,  Kiyoshi Mitani

IPC分类号： C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： C30B31/22 ,  C30B29/06 ,  C30B29/52

摘要： The present invention provides a method for producing a semiconductor wafer comprising at least steps of, forming a Si1-XGeX layer (0

摘要翻译： 本发明提供一种用于制造半导体晶片的方法，该方法至少包括以下步骤：形成具有临界状态的Si 1-X 1 Ge x X 1层（0

公开(公告)号：US06998329B2

公开(公告)日：2006-02-14

申请号：US10483613

申请日：2002-07-24

申请人： Hiroji Aga ,  Hiroyuki Takahashi ,  Kiyoshi Mitani

发明人： Hiroji Aga ,  Hiroyuki Takahashi ,  Kiyoshi Mitani

IPC分类号： H01L21/30 ,  B65G49/07

CPC分类号： H01L21/67092 ,  H01L21/76254 ,  Y10S414/135

摘要： In the process of fabricating an SOI wafer based on the Smart Cut® Process, a stack 34 of an SOI wafer 39 and a residual wafer 38 are separated into the individual wafers using a wafer separation jig 1 of this invention. The wafer separation jig 1 comprises a supporting plane 1p on which the stack 34 is supported in the thickness-wise direction, and a stepped portion 2 disposed on the supporting plane 1p, and having a height adjusted so as to stop movement-by-sliding of the lower wafer of the stack, but so as to allow movement-by-sliding of the upper wafer relative to the lower wafer. Both wafers are separated from each other by inclining the supporting plane 1p with the stack 34 placed thereon, so as to allow the upper wafer to move by sliding as being driven by its own weight in the in-plane direction relative to the lower wafer. This method is successful in effectively suppressing friction between the wafers, and thus in preventing the wafer surface from being scratched.

摘要翻译： 在制造基于智能切割工艺的SOI晶片的过程中，使用本发明的晶片分离夹具1将SOI晶片39的堆叠34和残余晶片38分离成单个晶片。 晶片分离夹具1包括在其上沿着​​厚度方向支撑着堆叠34的支撑平面1p和设置在支撑平面1p上的阶梯部分2，并且具有调节以便停止移动的高度 - 堆叠的下部晶片的滑动，但是允许上部晶片相对于下部晶片的滑动。 通过使支撑平面1p与放置在其上的叠层34相互倾斜来将两个晶片彼此分离，以便允许上晶片通过其自重由相对于下晶片的面内方向驱动的滑动而滑动 。 该方法成功地有效地抑制晶片之间的摩擦，从而防止晶片表面被划伤。

公开(公告)号：US20050118789A1

公开(公告)日：2005-06-02

申请号：US10507175

申请日：2003-12-25

申请人： Hiroji Aga ,  Isao Yokokawa ,  Kiyotaka Takano ,  Kiyoshi Mitani

发明人： Hiroji Aga ,  Isao Yokokawa ,  Kiyotaka Takano ,  Kiyoshi Mitani

IPC分类号： H01L21/02 ,  H01L21/265 ,  H01L21/762 ,  H01L27/12 ,  H01L21/30 ,  H01L21/46

CPC分类号： H01L21/26533 ,  H01L21/76254

摘要： The present invention relates to a method of producing an SOI wafer in which an SOI layer is formed on a buried oxide film by forming an oxide film on a surface of at least one of a bond wafer and a base wafer, bonding the bond wafer to the base wafer through the formed oxide film, and making the bond wafer into a thin film, wherein after the oxide film is formed so that a total thickness of the oxide film formed on the surface of at least one of the bond wafer and the base wafer is thicker than a thickness of the buried oxide film that the SOI wafer to be produced has, the bond wafer is bonded to the base wafer through the formed oxide film, the bond wafer is made into a thin film to form an SOI layer, and thereafter, an obtained bonded wafer is subjected to heat treatment to reduce a thickness of the buried oxide film. Thereby, there can be provided a method of producing an SOI wafer in which blisters and voids are not generated even if the thickness of the buried oxide film is thinned, and its SOI layer has extremely good crystallinity.

摘要翻译： 本发明涉及一种制造SOI晶片的方法，其中通过在接合晶片和基底晶片中的至少一个的表面上形成氧化膜，在掩埋氧化膜上形成SOI层，将接合晶片接合到 通过形成的氧化膜的基底晶片，并将接合晶片制成薄膜，其中在形成氧化物膜之后，使得形成在至少一个接合晶片和基底的表面上的氧化膜的总厚度 晶片比所制造的SOI晶片的埋入氧化膜的厚度厚，通过形成的氧化膜将接合晶片接合到基底晶片，将接合晶片制成薄膜以形成SOI层， 然后，对获得的接合晶片进行热处理以减小掩埋氧化膜的厚度。 因此，可以提供一种制造SOI晶片的方法，其中即使掩埋氧化膜的厚度变薄也不会产生起泡和空隙，并且其SOI层具有非常好的结晶度。

公开(公告)号：US20050042840A1

公开(公告)日：2005-02-24

申请号：US10948234

申请日：2004-09-24

申请人： Hiroji Aga ,  Naota Tate ,  Susumu Kuwabara ,  Kiyoshi Mitani

发明人： Hiroji Aga ,  Naota Tate ,  Susumu Kuwabara ,  Kiyoshi Mitani

IPC分类号： H01L21/762 ,  H01L21/30 ,  H01L21/46

CPC分类号： H01L21/76254 ,  Y10S438/977

摘要： A method for producing an SOI wafer by the hydrogen ion delamination method comprising at least a step of bonding a base wafer and a bond wafer having a micro bubble layer formed by gas ion implantation and a step of delaminating a wafer having an SOI layer at the micro bubble layer as a border, wherein, after the delamination step, the wafer having an SOI layer is subjected to a two-stage heat treatment in an atmosphere containing hydrogen or argon utilizing a rapid heating/rapid cooling apparatus (RTA) and a batch processing type furnace. Preferably, the heat treatment by the RTA apparatus is performed first. Surface roughness of an SOI layer surface delaminated by the hydrogen ion delamination method is improved over the range from short period to long period, and SOI wafers free from generation of pits due to COPs in SOI layers are efficiently produced with high throughput.

公开(公告)号：US07320929B2

公开(公告)日：2008-01-22

申请号：US10522413

申请日：2003-07-16

申请人： Hiroji Aga ,  Kiyoshi Mitani

发明人： Hiroji Aga ,  Kiyoshi Mitani

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L21/265 ,  H01L21/26506 ,  H01L21/76224 ,  H01L21/76254

摘要： In order to adjust thickness of a bonded silicon single crystal film 15 depending of thickness of an SOI layer 5 to be obtained, depth of formation d1+tx of a separatory ion implanted layer 4, measured from a first main surface J, in the separatory ion implanted layer formation step is adjusted through energy of the ion implantation. Dose of the ion implantation is set smaller as the depth of formation measured from the first main surface J becomes smaller. A smaller dose results in a smaller surface roughness of the separation surface, and makes it possible to reduce polishing stock removal of the separation surface of the bonded silicon single crystal film in the planarization step. Uniformity in the thickness of the SOI layer can consequently be improved even for the case where a thin SOI layer has to be formed. The present invention is therefore successful in providing a method of fabricating an SOI wafer capable of suppressing variations in the intra-wafer and inter-wafer uniformity of the thickness of the SOI layer to a sufficiently low level, even for the case where a required level of the thickness of the SOI layer is extremely small.

摘要翻译： 为了根据所获得的SOI层5的厚度来调整键合硅单晶膜15的厚度，从第一主表面J测量的分离离子注入层4的形成深度d 1 + t x， 通过离子注入的能量来调节分离离子注入层形成步骤。 随着从第一主表面J测量的深度变小，离子注入的剂量变小。 较小的剂量导致分离表面的较小的表面粗糙度，并且使得可以在平坦化步骤中减少接合的硅单晶膜的分离表面的抛光原料去除。 因此，即使在必须形成薄的SOI层的情况下，也可以提高SOI层的厚度的均匀性。 因此，本发明成功地提供了一种制造SOI晶片的方法，其能够将SOI层的厚度的晶片内和晶片间均匀度的均匀度抑制到足够低的水平，即使在所需的水平的情况下 的SOI层的厚度非常小。