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公开(公告)号：US20150130729A1
公开(公告)日：2015-05-14
申请号：US14398661
申请日：2012-07-19
IPC分类号： G06F3/041
CPC分类号： G06F3/0418 , G06F3/0416 , G06F3/0488
摘要： A display device includes a liquid crystal display panel 5, a touch panel 3 that is disposed on a display surface side of the liquid crystal display panel 5 and that has a touch operation area wider than a display area of the above-mentioned liquid crystal display panel 5, and a guard 4 or 4a that is disposed between an area 3a included in the touch operation area and corresponding to the display area, and an area 3b included in the touch operation area and corresponding to an outside of the display area, and that physically restricts an operation object which performs an operation on the above-mentioned touch operation area from moving between the areas.
摘要翻译： 显示装置包括液晶显示面板5，设置在液晶显示面板5的显示面侧的触摸面板3，并且具有比上述液晶显示器的显示区域宽的触摸操作区域 面板5和设置在触摸操作区域中包括的对应于显示区域的区域3a之间的防护件4或4a以及包括在触摸操作区域中并对应于显示区域的外部的区域3b，以及 物理地限制对上述触摸操作区域执行操作的操作对象在区域之间移动。
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公开(公告)号：US20150116235A1
公开(公告)日：2015-04-30
申请号：US14403086
申请日：2012-09-04
IPC分类号： G06F3/041
摘要： An information apparatus includes a liquid crystal display unit 6; a touch panel 3 that is mounted on the display surface of the liquid crystal display unit 6, that has a touch operation area wider than the display area of the liquid crystal display unit 6, and that has a specific operation handling section 3b which is formed on an area corresponding to an extra-display area of the touch operation area and which accepts an operation for a specific operation item of an information apparatus 1; a controller 7 that carries out control in a manner that causes the specific operation handling section 3b to accept an operation corresponding to a specific operation item of external equipment 2.
摘要翻译： 信息装置包括：液晶显示单元6; 安装在液晶显示单元6的显示表面上的触摸面板3具有比液晶显示单元6的显示区域宽的触摸操作区域，并且具有形成的特定操作处理部分3b 在对应于触摸操作区域的超显示区域并且接受信息装置1的特定操作项目的操作的区域上; 以使特定操作处理部3b接受与外部设备2的特定操作项目相对应的操作的方式进行控制的控制器7。
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公开(公告)号：US20150097785A1
公开(公告)日：2015-04-09
申请号：US14391221
申请日：2012-06-14
IPC分类号： G06F3/01
CPC分类号： G06F3/016 , G06F1/1684 , H01H2215/028 , H01H2215/046
摘要： A display device includes a touch panel 3 that has a touch operation area wider than an image display area, an operation member formed in an area 3b, other than the image display area, in the touch operation area, and an operation feeling generator 7 that provides an operation feeling for a pointing object which has operated the operation member.
摘要翻译： 显示装置包括具有比图像显示区域宽的触摸操作区域的触摸面板3，形成在触摸操作区域中的图像显示区域以外的区域3b中的操作构件和操作感觉发生器7， 为操作操作构件的指示物提供操作感。
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公开(公告)号：US20080044613A1
公开(公告)日：2008-02-21
申请号：US11666820
申请日：2005-09-13
申请人： Masakazu Shoji , Keishi Fujii
发明人： Masakazu Shoji , Keishi Fujii
IPC分类号： B29C45/38
CPC分类号： B29C45/2708 , Y10T428/15 , Y10T428/24479 , Y10T428/2457
摘要： In gate-processed moldings fabricated by cutting off a gate 5 formed on resin moldings 1 during molding of the resin moldings 1, an introducing section 4 for cutting off the gate is formed thereon.
摘要翻译： 在树脂模制品1成型期间切割形成在树脂模制品1上的浇口5制成的浇口加工模制品中，形成用于切断浇口的引入部分4。
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公开(公告)号：US06366074B1
公开(公告)日：2002-04-02
申请号：US09534189
申请日：2000-03-24
申请人： Masakazu Shoji
发明人： Masakazu Shoji
IPC分类号： G01R1900
CPC分类号： H03F1/34
摘要： A method for creating signal unidirectionality in electronic circuits is disclosed. This invention describes a method for achieving unidirectionality in an electronic circuit with an input side having a signal source and an output side with a load comprising detecting the current passing through the load on the output side, bypassing a portion of the current passing through the load on the output side, and feeding the bypassed portion of the current on the output side to the input side to achieve unidirectionality. Specifically, unidirectionality in an electronic circuit is accomplished by applying feedback such that the impedance looking into the input of the amplifier is increased. These methods are particularly applicable to negative resistance amplifier circuits.
摘要翻译： 公开了一种用于在电子电路中产生信号单向性的方法。 本发明描述了一种在电子电路中实现单向性的方法，其输入侧具有信号源和输出侧，负载包括检测通过输出侧的负载的电流，绕过通过负载的电流的一部分 在输出侧，将输出侧的电流的旁通部分输入到输入侧，以实现单向性。 具体地，电子电路中的单向性通过施加反馈来实现，使得看起来放大器的输入的阻抗增加。 这些方法特别适用于负电阻放大器电路。
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公开(公告)号：US06285247B1
公开(公告)日：2001-09-04
申请号：US09235007
申请日：1999-01-21
申请人： Masakazu Shoji
发明人： Masakazu Shoji
IPC分类号： H03K17687
CPC分类号： G06F17/5063
摘要： Operation of CMOS integrated circuits at a reduced voltage are optimized. A digital system comprises a plurality of P-channel metal oxide field effect transistors and a plurality of N-channel metal oxide field effect transistors arranged in complementary symmetry pairs. The P-channel transistors have a PFET conduction threshold voltage. The N-channel transistors have an NFET conduction threshold voltage. The threshold voltages are determined by extrapolation from the (high) gate to source voltage. Each of the N-channel transistors is paired with a corresponding P-channel transistor. The pairing is arranged in complementary symmetry (CMOS). A power supply connected across one of the pair formed from N-channel and P-channel transistors arranged in complementary symmetry is set to a voltage equal to the sum of the PFET conduction threshold voltage and the NFET conduction threshold voltage.
摘要翻译： 优化了降低电压的CMOS集成电路的工作。 数字系统包括多个P沟道金属氧化物场效应晶体管和以互补对称对排列的多个N沟道金属氧化物场效应晶体管。 P沟道晶体管具有PFET导通阈值电压。 N沟道晶体管具有NFET导通阈值电压。 通过从（高）栅极到源极电压的外插来确定阈值电压。 每个N沟道晶体管与相应的P沟道晶体管配对。 配对以互补对称（CMOS）排列。 连接在由互补对称排列的N沟道晶体管和P沟道晶体管形成的一对上的电源被设置为等于PFET导通阈值电压和NFET导通阈值电压之和的电压。
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7.发明授权
公开(公告)号：US4670670A
公开(公告)日：1987-06-02
申请号：US658207
申请日：1984-10-05
申请人： Masakazu Shoji
发明人： Masakazu Shoji
IPC分类号： G05F3/20 , H01L27/02 , H03L1/00 , G05F5/00 , H03K19/003 , H03K19/007
CPC分类号： G05F3/205 , H01L27/0218
摘要： The threshold voltage of a CMOS circuit is stabilized by a feedback loop which responds to variations in threshold voltage of a reference FET to provide a backbias voltage to readjust the threshold voltage of a second FET. The circuit is particularly useful to overcome threshold variations due to .gamma.-radiation.
摘要翻译： CMOS电路的阈值电压通过响应于参考FET的阈值电压变化的反馈环来稳定，以提供反向电压来重新调整第二FET的阈值电压。 该电路特别有助于克服伽马辐射引起的阈值变化。
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公开(公告)号：US4668880A
公开(公告)日：1987-05-26
申请号：US593099
申请日：1984-03-26
申请人： Masakazu Shoji
发明人： Masakazu Shoji
IPC分类号： G06F7/00 , H03K19/096 , H03K19/177 , G06F7/38 , H03K19/173
CPC分类号： H03K19/0963 , H03K19/1772
摘要： Additional data processing capability can be added to a programmed logic array (PLA), having an AND plane and an OR plane connected serially between an input register and an output register, by inserting a multistage domino CMOS logic network between the OR plane and the output register. The OR plane is an array of single-stage domino CMOS logic and is timed so that it precharges simultaneously with the multistage network. Without prolonging the individual phase durations or adding any registers, the added domino logic network can have a propagation delay time corresponding to more than one phase of the PLA, and hence the network can have correspondingly more stages and more added data processing capability.
摘要翻译： 可以通过在OR平面和输出端之间插入多级多米诺CMOS逻辑网络，将附加的数据处理能力添加到编程逻辑阵列（PLA），该逻辑阵列具有AND平面和串行连接在输入寄存器和输出寄存器之间的OR平面 寄存器。 OR平面是单级多米诺CMOS逻辑的阵列，并且被定时，以便与多级网络同时预充电。 在不延长单个相位持续时间或增加任何寄存器的情况下，增加的多米诺骨牌网络可以具有对应于PLA的多于一个阶段的传播延迟时间，因此网络可以具有相应更多的阶段和更多的附加数据处理能力。
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公开(公告)号：US4479216A
公开(公告)日：1984-10-23
申请号：US452157
申请日：1982-12-22
申请人： Robert H. Krambeck , Masakazu Shoji
发明人： Robert H. Krambeck , Masakazu Shoji
CPC分类号： H03K5/1565 , H03K5/133 , H03K2005/00195
摘要： An op-amp feedback arrangement is used to provide non-skewed clock pulses from a source of skewed clock pulses. Any skew in the clock-in pulses results in a change in the average voltage of a clock-out pulse at the output of the arrangement. The average voltage of the clock-out pulse is compared to a reference voltage to produce a control signal which adjusts the average voltage at the output. Critical transitions in the clock pulses occur at precise time relationships under the control of the control signal.
摘要翻译： 运算放大器反馈装置用于提供来自偏斜时钟脉冲源的非偏斜时钟脉冲。 时钟输入脉冲中的任何偏移导致布置输出端的输出脉冲的平均电压发生变化。 将时钟输出脉冲的平均电压与参考电压进行比较，以产生调整输出端的平均电压的控制信号。 时钟脉冲中的临界转换在控制信号的控制下以精确的时间关系发生。
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10.发明授权Digital signal transition edge alignment using interacting inverter chains 失效使用相互作用的逆变器链进行数字信号转换边沿对齐
公开(公告)号：US5959480A
公开(公告)日：1999-09-28
申请号：US811981
申请日：1997-03-05
申请人： Masakazu Shoji
发明人： Masakazu Shoji
CPC分类号： H03K5/159 , H03K5/133 , H03K5/1504
摘要： Apparatus and method for aligning signal transition edges in high-speed complementary metal-oxide-semiconductor (CMOS) integrated circuits and other electronic circuits, systems and devices. A transition edge alignment circuit in accordance with the invention includes first and second inverter chains, each having a plurality of series-connected inverters. A first signal, which may be a digital logic signal, is applied to an input of the first inverter chain. A second signal, which may be a clock signal used to latch the logic signal in an integrated circuit, is applied to an input of the second inverter chain. The inverter chains may be constructed such that the inverters of the second chain have a stronger drive capability than the corresponding inverters of the first chain. Capacitive coupling is provided between outputs of inverters of the first chain and outputs of corresponding inverters of the second chain. The capacitive coupling provides interaction between the first and second inverter chains which acts to align transition edges of the first and second signals as the signals propagate through the respective first and second inverter chains. The edge alignment process may be facilitated by intentionally reducing a transition rate of either the first or second signal. This intentional transition rate reduction could be provided by applying the first or second signal to a delay circuit at an input of the corresponding inverter chain, or by connecting additional capacitive loads to outputs of the first several inverters in the corresponding inverter chain.
摘要翻译： 用于在高速互补金属氧化物半导体（CMOS）集成电路和其他电子电路，系统和装置中对准信号转变边缘的装置和方法。 根据本发明的过渡边缘对准电路包括第一和第二逆变器链，每个具有多个串联连接的逆变器。 可以将第一信号（其可以是数字逻辑信号）施加到第一反相器链的输入端。 可以将第二信号（其可以是用于锁存集成电路中的逻辑信号的时钟信号）施加到第二反相器链的输入端。 逆变器链可以被构造成使得第二链的逆变器具有比第一链的相应逆变器更强的驱动能力。 在第一链路的逆变器的输出和第二链路的对应的逆变器的输出之间提供电容耦合。 电容耦合提供第一和第二反相器链之间的相互作用，当第一和第二反相器链通过相应的第一和第二反相器链传播时，它们用于对准第一和第二信号的过渡边缘。 可以通过有意地减小第一或第二信号的转变速率来促进边缘对准过程。 可以通过将第一或第二信号施加到对应的逆变器链的输入处的延迟电路，或通过将附加的电容性负载连接到相应的逆变器链中的前几个逆变器的输出来提供这种有意的转变速率降低。
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