摘要:
In a thin film transistor, a first insulating film on a silicon layer formed in an island on a substrate is smaller in thickness than the silicon layer so that the stepped island edges is gentle in slope to facilitate covering the island with a second insulating film. This reduces occurrence of gate leak considerably. Since the peripheral region of the stepped island is smaller in thickness than the central region above the channel, it is possible to minimize occurrence of gate electrode breakage. The silicon layer contains two or more inert gas atoms, and the atoms smaller in mass number (e.g., He) are contained in and near an interface with a silicon active layer while the atoms larger in mass number (e.g., Ar) than those smaller in mass number are contained in and near a second interface with a gate electrode.
摘要:
In a thin film transistor, a first insulating film on a silicon layer formed in an island on a substrate is smaller in thickness than the silicon layer so that the stepped island edges is gentle in slope to facilitate covering the island with a second insulating film. This reduces occurrence of gate leak considerably. Since the peripheral region of the stepped island is smaller in thickness than the central region above the channel, it is possible to minimize occurrence of gate electrode breakage. The silicon layer contains two or more inert gas atoms, and the atoms smaller in mass number (e.g., He) are contained in and near an interface with a silicon active layer while the atoms larger in mass number (e.g., Ar) than those smaller in mass number are contained in and near a second interface with a gate electrode.
摘要:
In a thin film transistor, a first insulating film on a silicon layer formed in an island on a substrate is smaller in thickness than the silicon layer so that the stepped island edges is gentle in slope to facilitate covering the island with a second insulating film. This reduces occurrence of gate leak considerably. Since the peripheral region of the stepped island is smaller in thickness than the central region above the channel, it is possible to minimize occurrence of gate electrode breakage. The silicon layer contains two or more inert gas atoms, and the atoms smaller in mass number (e.g., He) are contained in and near an interface with a silicon active layer while the atoms larger in mass number (e.g., Ar) than those smaller in mass number are contained in and near a second interface with a gate electrode.
摘要:
In a thin film transistor, a first insulating film on a silicon layer formed in an island on a substrate is smaller in thickness than the silicon layer so that the stepped island edges is gentle in slope to facilitate covering the island with a second insulating film. This reduces occurrence of gate leak considerably. Since the peripheral region of the stepped island is smaller in thickness than the central region above the channel, it is possible to minimize occurrence of gate electrode breakage. The silicon layer contains two or more inert gas atoms, and the atoms smaller in mass number (e.g., He) are contained in and near an interface with a silicon active layer while the atoms larger in mass number (e.g., Ar) than those smaller in mass number are contained in and near a second interface with a gate electrode.
摘要:
An image processing apparatus and method converts a moving image signal into an image data format consisting of a luminance signal and a color-difference signal like that of the YUV format at a signal processing circuit 4, compression-encodes the image data at a compression circuit 10 and records it on a recording medium 11, in addition to reducing the same-format image data color-difference signal to generate image data for display, enabling the image processing apparatus for recording a moving image to achieve moving image recording of a quality that is good enough to be used as still images.
摘要:
An image capture apparatus capable of generating a mirror image of a captured image and superimposing character patterns on the mirror image. The image capture apparatus includes an image capture device and a display device. The display device is rotatably coupled to the image capture device such that the display device can rotate between a normal position and self-portrait position. When in the self-portrait position, the display device displays a mirror image of the captured image, a superimposed character pattern, and an operation condition pattern. Furthermore, the image capture apparatus includes operation devices that are inhibited from operating by a user when in the self-portrait mode.
摘要:
In a semiconductor device of the present invention, a first base region 16 is extended to a part under a gate electrode 7 while having a vertical concentration profile of an impurity that increases from the surface of a semiconductor layer 3 and becomes maximum under an emitter region 5, and the length in the lateral direction from a point where the impurity concentration becomes maximum located under an end of the gate electrode 7 to the boundary with a second base region is is not smaller than the length in the vertical direction from the point where the impurity concentration becomes maximum to the boundary with the second base region 15.
摘要:
An object of the present invention is to provide a semiconductor device which enables to reduce the device area, while securing the breakdown voltage between the drain and the source of each MOS transistor for the semiconductor device including plural MOS transistors, which are arrayed adjacently each other, with different types of channel conductivity. The semiconductor device includes a semiconductor substrate, a buried oxide film and a semiconductor layer, and furthermore the semiconductor layer has an island-like semiconductor layer, in which a MOS transistor is formed, the MOS transistor has a source region, and a drain region that is positioned in the periphery of the source region, an island-like semiconductor layer, in which a MOS transistor is formed, the MOS transistor has a drain region, and a source region that is positioned in the periphery of the drain region, an isolation trench which isolates the former island-like semiconductor layer from other portions of the semiconductor layer, an isolation trench which isolates the latter island-like semiconductor layer from other portions of the semiconductor layer, and a buffer region, in which the electric potential is fixed to the lowest electric potential in a circuit, which prevents an electrical interference occurred between transistors.
摘要:
The invention relates to a novel surfactant which is obtained by blending an N—C8-24 acylamino acid and an alkali salt of an amino acid, and also relates to a detergent composition comprising this surfactant as a cleansing component and an emulsion composition comprising this surfactant as an emulsifying component. In the alkali salt of an amino acid, a suitable amino acid is an acidic or neutral α-amino acid, and a suitable alkali is sodium, potassium, triethanolamine, or N-methyltaurine sodium. In the N—C8-24 acylamino acid, a suitable amino acid is acidic or neutral, and a suitable C8-24 acyl is a C12-18 acyl. This surfactant can provide a detergent composition which ensures good lathering ability and foam quality and which does not cause stiff hair or taut skin after use. The surfactant can also provide an emulsion composition which ensures a good emulsion state.
摘要:
A control unit is provided that controls a motor that opens and closes a door of an electric train such that, if an abnormality is detected by a position sensor, continuation of its open/closing operation can be maintained. The control unit includes an arrangement for computing the actual rotation speed and the magnetic polar position of the motor; a position sensor abnormality-detecting identifier unit for detecting abnormalities in the output of the position sensor; and a first controlling arrangement that generates voltage-instructing values by applying the magnetic polar position so as to cause a speed detection value to correspond to the speed instruction value. The control unit further includes a second controlling arrangement, which in turn includes an F/V arithmetic unit 24 and integrator 25; and a switcher unit 27. The F/V arithmetic unit 24 generates a voltage instruction value having a specific magnitude and phase corresponding to the speed instruction value by utilization of magnetic polar position data that is obtained via integration of a frequency corresponding to the speed instruction value. The switcher unit 27 selects either of the first and second controlling arrangements so as to generate voltage-instructing values for a power converter 3. When the output of the position sensor is normal, the switcher unit 27 selects a specific voltage-instructing value delivered from the first controlling arrangement, whereas if the position of the sensor 5 is abnormal, the switcher unit 27 selects a specific voltage-instructing value delivered from the second controlling arrangement.