公开(公告)号：US4990390A

公开(公告)日：1991-02-05

申请号：US448950

申请日：1989-12-12

申请人： Hirotaka Kawasaki ,  Takanori Hirai ,  Takuro Odawara ,  Kimitoshi Ryokai ,  Osamu Furukawa ,  Masayoshi Sato ,  Teruyuki Nakatsuji ,  Minoru Sugita ,  Kenichi Sekine

发明人： Hirotaka Kawasaki ,  Takanori Hirai ,  Takuro Odawara ,  Kimitoshi Ryokai ,  Osamu Furukawa ,  Masayoshi Sato ,  Teruyuki Nakatsuji ,  Minoru Sugita ,  Kenichi Sekine

IPC分类号： E02D29/02

CPC分类号： E02D29/0241 ,  Y10S428/902 ,  Y10T428/24058 ,  Y10T428/24124 ,  Y10T428/30

摘要： A fiber grid reinforcement is of a flat shape and has first and second directions perpendicular to each other. The fiber grid reinforcement includes a plurality of first fiber bundles, a plurality of second fiber bundles, and a resin material. The first fiber bundles are generally disposed along the first direction and generally parallel to one another. Each of the first fiber bundles includes at least one first group of fibers. The second fiber bundles are generally disposed along the second direction and generally parallel to one another. Each of the second fiber bundles inbcludes at least one second group of fibers. The second fiber bundles intersect perpendicular to the first fiber bundles at intersecting sections so as to form a grid structure. The first group and the second group of fibers are layered alternately at the intersecting sections in such a manner that at least one outermost layer is the second group. The resin material bonds fibers in each group, and bonds the groups to one another. Each of the first group has a plurality of fibers, the fibers being generally arranged along the first direction. Each of the second group has a plurality of fibers, the fibers being generally arranged along the second direction. Each of the second fiber bundles includes a greater number of fibers than each of the first fiber bundles. Accordingly, the fiber grid reinforcement has a greater flexibility in the first direction than in the second direction.

摘要翻译： 纤维网格加强件具有平坦的形状并且具有彼此垂直的第一和第二方向。 纤维网格加强件包括多个第一纤维束，多个第二纤维束和树脂材料。 第一纤维束通常沿着第一方向设置并且大致彼此平行。 每个第一纤维束包括至少一个第一组纤维。 第二纤维束通常沿着第二方向设置并且大致彼此平行。 每个第二纤维束包含至少一个第二组纤维。 第二纤维束在相交部分垂直于第一纤维束交叉以形成网格结构。 第一组和第二组纤维在交叉部交替地层叠，使得至少一个最外层是第二组。 树脂材料将各组中的纤维结合，并将基团彼此粘合。 第一组中的每一个具有多个纤维，所述纤维通常沿着第一方向布置。 第二组中的每一个具有多个纤维，所述纤维通常沿第二方向布置。 每个第二纤维束包括比每个第一纤维束更多数量的纤维。 因此，纤维网格加强件在第一方向上比在第二方向上具有更大的灵活性。

公开(公告)号：US07315455B2

公开(公告)日：2008-01-01

申请号：US10615298

申请日：2003-07-09

申请人： Osamu Furukawa ,  Toshihiko Murata ,  Osamu Ikata

发明人： Osamu Furukawa ,  Toshihiko Murata ,  Osamu Ikata

IPC分类号： H05K7/00

CPC分类号： H01L25/50 ,  H01L24/45 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/165 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/10329 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/20753 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： More compact, thinner, shorter and lighter surface-mounted electronic component modules and their manufacturing methods at low costs, thus making them industrially highly valuable are available. Such the component includes a wiring substrate having wiring patterns formed on one side and external connection terminals formed on the other side, the wiring patterns and the external connection terminals being connected with each other by via holes or through holes; a plurality of electronic component devices mounted on the one side of the wiring substrate; and an exterior resin layer formed on the wiring substrate which covers the plurality of electronic component devices, wherein at least one of the plurality of electronic component devices is fastened face up to the one side of the wiring substrate, the connection terminal of the electronic component device fastened face up and the wiring pattern or the connection terminal of another electronic component device being connected with each other by wire.

摘要翻译： 更小巧，更薄，更短，更轻和更轻的表面安装电子元件模块及其制造方法，成本低廉，从而使其在工业上非常有价值。 这种组件包括具有形成在一侧的布线图案和形成在另一侧上的外部连接端子的布线基板，布线图案和外部连接端子通过通孔或通孔彼此连接; 安装在所述布线基板一侧的多个电子部件装置; 以及形成在所述布线基板上的外部树脂层，所述外部树脂层覆盖所述多个电子部件装置，其中，所述多个电子部件装置中的至少一个被紧固到所述布线基板的一侧，所述电子部件的连接端子 装置正面朝上，并且另一个电子部件装置的布线图案或连接端子通过导线彼此连接。

公开(公告)号：US06914367B2

公开(公告)日：2005-07-05

申请号：US10312863

申请日：2001-07-06

申请人： Osamu Furukawa

发明人： Osamu Furukawa

IPC分类号： H03H3/08 ,  H03H9/25 ,  H01L41/053 ,  H03H9/10

CPC分类号： H03H9/059 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/97 ,  H03H3/08 ,  H03H9/1078 ,  H03H9/1085 ,  H03H9/25

摘要： A surface acoustic wave device used in, for example, a mobile communications field as a filter or duplexer and the like to handle high frequencies of about several GHz is fabricated by flip-chip-connecting a surface of a piezoelectric substrate to a base board facing thereto, emitting particulate first sealing material from above a back face of the piezoelectric substrate to apply the first sealing material to the back face of the piezoelectric substrate and hang the first sealing material from edges of the piezoelectric substrate to the base board to form bridging, and forming second sealing material on the first sealing material. These operations provide a manufacturing method of a small-sized surface-mounting surface acoustic wave device appropriate for flip-chip connection.

摘要翻译： 用于例如作为滤波器或双工器等的移动通信领域中用于处理大约几GHz的高频的表面声波装置通过将压电基板的表面倒装连接到基板 从压电基板的背面上方排出微粒第一密封材料，以将第一密封材料施加到压电基板的背面，并将第一密封材料从压电基板的边缘悬挂到基板上以形成桥接， 以及在所述第一密封材料上形成第二密封材料。 这些操作提供适用于倒装芯片连接的小尺寸表面安装声表面波装置的制造方法。

公开(公告)号：US06339704B1

公开(公告)日：2002-01-15

申请号：US09262319

申请日：1999-03-04

申请人： Osamu Furukawa

发明人： Osamu Furukawa

IPC分类号： H04B126

CPC分类号： H03H9/0042

摘要： A surface acoustic wave device with an electrode structure that suppresses the deterioration of a withstand voltage against an overvoltage such as a surge voltage or noise applied to a balanced signal terminal is provided. A serial resonator 5 that blocks a voltage is disposed among IDTs 7, 9, 11 and a signal output terminal 3 of the surface acoustic wave device. In addition, a serial resonator 6 is disposed among the IDTs 7, 9, 11, and a signal output terminal 4. The serial resonators 5 and 6 operate as part of IDTs to extract a desired band signal. The structure of the serial resonator 5 should be almost the same as that of the serial resonator 6.

摘要翻译： 提供一种具有电极结构的表面声波器件，其抑制耐电压劣化，例如浪涌电压或施加到平衡信号端子的噪声等过电压。 阻挡电压的串联谐振器5配置在声表面波装置的IDT7,9,11和信号输出端子3之间。 此外，串联谐振器6设置在IDT7,9,11和信号输出端子4之间。串行谐振器5和6作为IDT的一部分进行操作以提取期望的频带信号。 串联谐振器5的结构应该与串联谐振器6的结构几乎相同。

公开(公告)号：US5164882A

公开(公告)日：1992-11-17

申请号：US808674

申请日：1991-12-17

申请人： Hideyuki Kanai ,  Yohachi Yamashita ,  Osamu Furukawa ,  Kumi Okuwada

发明人： Hideyuki Kanai ,  Yohachi Yamashita ,  Osamu Furukawa ,  Kumi Okuwada

IPC分类号： C04B35/49 ,  C04B35/491 ,  H01B3/12 ,  H01G4/12

CPC分类号： H01G4/1245 ,  C04B35/491

摘要： A ceramic capacitor includes at least two opposing electrodes, and a dielectric ceramic composition arranged between the electrodes, wherein the ceramic composition is represented by a formula (Pb.sub.1-x Ae.sub.x) (Zr.sub.1-y Ti.sub.y)O.sub.3 (wherein x represents 0.15 to 0.90, y represents 0 to 0.80, and Ae represents at least one type of an element selected from the group consisting of Ca and Sr), and has a composition in which assuming that the total number of moles of elements constituting a site A consisting of Pb and Ae is (A) and that the total number of moles of elements constituting a site B consisting of Zr and Ti is (B), (A)/(B) is 1.00 or less. The site A of the dielectric ceramic composition may be partially substituted with Ba. The dielectric ceramic composition may be obtained by adding Nb, Cu, Bi, Mn, Co, Ag, Si, Ta, Mg, Zn, W and/or Ni to a composition which is represented by a formula (Pb.sub.1-x Ae.sub.x) (Zr.sub.1-y Ti.sub.y)O.sub.3 (wherein x represents 0.15 to 0.90, y represents 0 to 0.80, and Ae represents at least one type of an element selected from the group consisting of Ca, Sr, and Ba), and in which assuming that the total number of moles of elements constituting a site A consisting of Pb and Ae is (A) and that the total number of moles of elements constituting a site B consisting of Zr and Ti is (B), (A)/(B) is 1.00 or less. The dielectric ceramic composition is preferably formed by using a powder synthesized by a hydrothermal synthesis as a material, and its grain size is preferably 3 .mu.m or less.

摘要翻译： 陶瓷电容器包括至少两个相对的电极和布置在电极之间的介电陶瓷组合物，其中陶瓷组合物由式（Pb1-xAex）（Zr1-yTiO）O3表示（其中x表示0.15至0.90，y表示 0〜0.80，Ae表示选自Ca和Sr中的至少一种元素），并且具有假定构成由Pb和Ae构成的位点A的元素的总摩尔数为 （A），构成由Zr和Ti构成的部位B的元素的总摩尔数为（B），（A）/（B）为1.00以下。 电介质陶瓷组合物的位置A可以部分地被Ba取代。 介电陶瓷组合物可以通过将Nb，Cu，Bi，Mn，Co，Ag，Si，Ta，Mg，Zn，W和/或Ni添加到由式（Pb1-xAex）（Zr1 -yTiy）O 3（其中x表示0.15〜0.90，y表示0〜0.80，Ae表示选自Ca，Sr和Ba中的至少一种元素），其中假设总数 构成由Pb和Ae构成的部位A的元素的摩尔数为（A），构成由Zr和Ti构成的部位B的元素的总摩尔数为（B），（A）/（B）为1.00或 减。 电介质陶瓷组合物优选通过使用通过水热合成合成的粉末作为材料形成，其粒径优选为3μm以下。

公开(公告)号：US4767732A

公开(公告)日：1988-08-30

申请号：US90605

申请日：1987-08-28

申请人： Osamu Furukawa ,  Seiichi Yoshida ,  Motomasa Imai ,  Mitsuo Harata

发明人： Osamu Furukawa ,  Seiichi Yoshida ,  Motomasa Imai ,  Mitsuo Harata

IPC分类号： C04B35/46 ,  C04B35/45 ,  C04B35/468 ,  C04B35/472 ,  H01G4/12

CPC分类号： C04B35/4684 ,  C04B35/472 ,  H01G4/1227 ,  H01G4/1254

摘要： To obtain a ceramic material having a high dielectric constant (K=2300 to 7000), a high insulation resistance (CR=4000 to 18000 ohmF), a low temperature dependence (.+-.10%) to (.+-.22, -33%) upon dielectric constant over a wide temperature range (-55 and +125.degree. C.) and a relatively low sintering temperature (1000.degree. C. to 1250.degree. C.), BaTiO.sub.3 powder at least 50 wt % of which is 0.7 to 3 .mu.m in particle size) is mixed with another compound with perovskite structure mainly composed of oxides of Pb, Ba, Sr, Zn, Nb, Mg and Ti before sintering. Further, part of Ti of BaTiO.sub.3 is substitutable with Zr or Sn, and part of Ba of BaTiO.sub.3 is substitutable with Sr, Ca or Ce.

摘要翻译： 为了获得具有高介电常数（K = 2300〜7000）的陶瓷材料，高绝缘电阻（CR = 4000〜18000ohmF），低温度依赖性（+/- 10％）〜（+/- 22， 33％）在较宽的温度范围（-55和+ 125℃）和相对低的烧结温度（1000℃至1250℃）下的介电常数，至少50重量％的BaTiO 3粉末为0.7 至3μm的粒径）与烧结前主要由Pb，Ba，Sr，Zn，Nb，Mg，Ti的氧化物构成的钙钛矿结构的其他化合物混合。 此外，BaTiO3的Ti的一部分可以用Zr或Sn代替，BaTiO3的Ba的一部分可以用Sr，Ca或Ce代替。

公开(公告)号：US08040344B2

公开(公告)日：2011-10-18

申请号：US12062258

申请日：2008-04-03

申请人： Yuuki Okada ,  Osamu Furukawa

发明人： Yuuki Okada ,  Osamu Furukawa

IPC分类号： G06T15/00

CPC分类号： G06F17/50 ,  G06F2217/34

摘要： The present invention reduces the number of diagrams and the workload of management and the like, by aggregating spools of a common format, in plant design technology using a three-dimensional CAD system. Format specific data which is stored separately according to spool format is obtained by aggregating the respective spools in the internal data, which is generated by a data acquisition means, into respective common formats by a spool aggregation means. In this process, a comparison and classification means compares the contents of the control point tables relating to the respective spools, between each and every pair of the spools, so as to confirm whether there exist control point tables which are the same, with taking all of the start points of each spool as a point of origin, thereby determines whether both spools of each pair are matching based on prescribed common characteristics, as the result of this determination, in cases where both spools are matching, then creates format specific data which is stored separately with respect to each spool format.

摘要翻译： 本发明通过使用三维CAD系统在工厂设计技术中聚合通用格式的卷轴来减少图形的数量和管理等的工作量。 通过线轴聚合装置将通过数据获取装置产生的内部数据中的相应线轴聚集成各自的公共格式，获得根据假脱机格式单独存储的格式的特定数据。 在该过程中，比较和分类装置比较在每一对线轴之间与各个线轴相关的控制点表的内容，以便确定是否存在相同的控制点表，全部是 作为原点的每个线轴的起始点，从而基于规定的共同特性来确定每对的两个线轴是否匹配，作为该确定的结果，在两个线轴匹配的情况下，然后创建格式特定数据，其中 相对于每个线轴格式分开存储。

公开(公告)号：US07511542B2

公开(公告)日：2009-03-31

申请号：US11939884

申请日：2007-11-14

申请人： Osamu Furukawa

发明人： Osamu Furukawa

IPC分类号： H03K21/00

CPC分类号： H03K23/662

摘要： A frequency dividing circuit includes: a D-type flip flop that outputs frequency-divided signal synchronized with input clock and reverse phase signal corresponding to the frequency-divided signal; a variable delay circuit that generates a delay feedback signal delayed by a specific delay time from the reverse phase signal input from the D-type flip flop and feeds back the delay feedback signal to the D-type flip flop; and a delay adjusting circuit that detects a phase difference between the reverse phase signal input from the D-type flip flop and the delay feedback signal input from the variable delay circuit, obtains detected results, and outputs to the variable delay circuit a control signal to perform control so that the delay time becomes time required to ensure setup/hold time of the D-type flip flop, based on the detected results.

摘要翻译： 分频电路包括：D型触发器，其输出与输入时钟同步的分频信号和对应于分频信号的反相信号; 一个可变延迟电路，产生延迟反馈信号，该延迟反馈信号从D型触发器输入的反相信号延迟特定的延迟时间，并将延迟反馈信号反馈到D型触发器; 以及延迟调整电路，其检测从D型触发器输入的反相信号与从可变延迟电路输入的延迟反馈信号之间的相位差，获得检测结果，并向可变延迟电路输出控制信号 执行控制，使得延迟时间成为确保D型触发器的建立/保持时间所需的时间，这取决于检测结果。

公开(公告)号：US06876946B2

公开(公告)日：2005-04-05

申请号：US10299819

申请日：2002-11-20

申请人： Masahiko Yasuda ,  Osamu Furukawa ,  Masaharu Kawakubo ,  Hiroki Tateno ,  Nobutaka Magome

发明人： Masahiko Yasuda ,  Osamu Furukawa ,  Masaharu Kawakubo ,  Hiroki Tateno ,  Nobutaka Magome

IPC分类号： G03F9/00 ,  G03B27/42

CPC分类号： G03F9/7003

摘要： A method of transferring a pattern of a mask onto shot areas on a substrate determines two sets of parameters in a single model equation. The parameters in one of the two sets relate to arrangement of a plurality of shot areas on the substrate, and the parameters in the other set relate to the shot areas per se. The mask and the substrate are moved relatively in accordance with the determined parameters.

摘要翻译： 将掩模的图案转移到基板上的拍摄区域的方法在单个模型方程式中确定两组参数。 两组之一中的参数涉及衬底上的多个照射区域的布置，而另一组中的参数涉及拍​​摄区域本身。 掩模和基板根据确定的参数相对移动。

公开(公告)号：US5365051A

公开(公告)日：1994-11-15

申请号：US92448

申请日：1993-07-14

申请人： Hiroyuki Suzuki ,  Osamu Furukawa

发明人： Hiroyuki Suzuki ,  Osamu Furukawa

IPC分类号： G03F7/20 ,  G03F7/207 ,  G03F9/00 ,  H01L21/027 ,  H01L21/30 ,  G01N21/86

CPC分类号： G03F9/7026 ,  G03F9/7003

摘要： A projection exposure apparatus has a structure in which the deviation in a focusing direction between a portion on a wafer which a focus sensor detects during exposure and a desired portion in a shot area is detected, and an offset corresponding to the deviation detected is applied to the focus sensor.

摘要翻译： 投影曝光装置具有这样的结构，其中检测在曝光期间聚焦传感器检测到的晶片上的部分与拍摄区域中的期望部分之间的聚焦方向上的偏差，并且将与检测到的偏差相对应的偏移应用于 焦点传感器。