公开(公告)号：US20050253272A1

公开(公告)日：2005-11-17

申请号：US10509898

申请日：2003-03-31

申请人： Hiroto Ohtake ,  Munehiro Tada ,  Yoshimichi Harada ,  Ken'ichiro Hijioka ,  Shinobu Saitoh ,  Yoshihiro Hayashi

发明人： Hiroto Ohtake ,  Munehiro Tada ,  Yoshimichi Harada ,  Ken'ichiro Hijioka ,  Shinobu Saitoh ,  Yoshihiro Hayashi

IPC分类号： H01L21/311 ,  H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76831 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76811 ,  H01L21/76813

摘要： A technique is provided for protecting an interlayer insulating film formed of an organic low dielectric constant material from any damage applied in a semiconductor process, and for attaining the decrease leak current in the interlayer insulating film, resulting in the improvement of reliability of a semiconductor device. The semiconductor device according to the present invention has an organic insulating films (5, 26, 28) having openings. The organic insulating films (5, 26, 28) have modified portions (5a, 26a, 28a) facing the openings. The modified portions (5a, 26a, 28a) contains fluorine atoms and nitrogen atoms. The concentration of the fluorine atoms in the modified portions (5a, 26a, 28a) is lower than the concentration of the nitrogen atoms. The above-mentioned modified layers (5a, 26a, 28a) protect the semiconductor device from the damage applied in the semiconductor process, while suppressing the corrosion of the conductors embedded in the openings.

摘要翻译： 提供了一种用于保护由有机低介电常数材料形成的层间绝缘膜的技术，用于在半导体工艺中施加的任何损坏，并且为了获得在层间绝缘膜中的减小的漏电流，从而提高半导体器件的可靠性 。 根据本发明的半导体器件具有具有开口的有机绝缘膜（5,26,28）。 有机绝缘膜（5,26,28）具有面向开口的变形部分（5a，26a，28a）。 改性部分（5a，26a，28a）含有氟原子和氮原子。 改性部分（5a，26a，28a）中氟原子的浓度低于氮原子的浓度。 上述改性层（5a，26a，28a）保护半导体器件免受在半导体工艺中的损坏，同时抑制嵌入在开口中的导体的腐蚀。

公开(公告)号：US07482694B2

公开(公告)日：2009-01-27

申请号：US10509898

申请日：2003-03-31

申请人： Hiroto Ohtake ,  Munehiro Tada ,  Yoshimichi Harada ,  Ken′ichiro Hijioka ,  Shinobu Saitoh ,  Yoshihiro Hayashi

发明人： Hiroto Ohtake ,  Munehiro Tada ,  Yoshimichi Harada ,  Ken′ichiro Hijioka ,  Shinobu Saitoh ,  Yoshihiro Hayashi

IPC分类号： H01L23/522

CPC分类号： H01L21/76831 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76811 ,  H01L21/76813

摘要： A technique is provided for protecting an interlayer insulating film formed of an organic low dielectric constant material from any damage applied in a semiconductor process, and for attaining the decrease leak current in the interlayer insulating film, resulting in the improvement of reliability of a semiconductor device. The semiconductor device according to the present invention has an organic insulating films having openings. The organic insulating films have modified portions facing the openings. The modified portions contains fluorine atoms and nitrogen atoms. The concentration of the fluorine atoms in the modified portions is lower than the concentration of the nitrogen atoms. The above-mentioned modified layers protect the semiconductor device from the damage applied in the semiconductor process, while suppressing the corrosion of the conductors embedded in the openings.

摘要翻译： 提供了一种用于保护由有机低介电常数材料形成的层间绝缘膜的技术，用于在半导体工艺中施加的任何损坏，并且为了获得在层间绝缘膜中的减小的漏电流，从而提高半导体器件的可靠性 。 根据本发明的半导体器件具有具有开口的有机绝缘膜。 有机绝缘膜具有面向开口的改性部分。 改性部分含有氟原子和氮原子。 改性部分中的氟原子的浓度低于氮原子的浓度。 上述改性层保护半导体器件免受在半导体工艺中的损坏，同时抑制嵌入在开口中的导体的腐蚀。

公开(公告)号：US20070013069A1

公开(公告)日：2007-01-18

申请号：US10558367

申请日：2004-05-28

申请人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

发明人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilayer wiring structure for connecting a semiconductor device is disclosed which is obtained by forming metal wirings on a substrate in which the semiconductor device is formed. The wiring structure free from such conventional problems that insulation between wirings next to each other is damaged or insulation resistance between wirings next to each other is deteriorated by generation of leakage current when fine metal wirings are formed in a porous insulating film. A method for producing such a wiring structure is also disclosed. In the metal wiring structure on the substrate in which the semiconductor device is formed, a insulating barrier layer (413) containing an organic matter is formed between an interlayer insulating film and a metal wiring. This insulating barrier layer reduces leakage current between wirings next to each other, thereby improving insulation reliability.

摘要翻译： 公开了一种用于连接半导体器件的多层布线结构，其通过在其中形成半导体器件的基板上形成金属布线而获得。 布线结构没有这样的常规问题，即在多孔绝缘膜中形成细金属布线时，通过产生漏电流而使彼此相邻的布线之间的绝缘损坏或彼此相邻的布线之间的绝缘电阻恶化。 还公开了一种用于制造这种布线结构的方法。 在形成了半导体器件的基板上的金属布线结构中，在层间绝缘膜和金属布线之间形成含有有机物质的绝缘阻挡层（413）。 该绝缘阻挡层减少彼此相邻的布线之间的漏电流，从而提高绝缘可靠性。

公开(公告)号：US08592303B2

公开(公告)日：2013-11-26

申请号：US12715088

申请日：2010-03-01

申请人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

发明人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

IPC分类号： H01L21/4763

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： There are provided with a wiring structure and a method for manufacturing the same wherein in a wiring structure of multi-layered wiring in which a metal wiring is formed on a substrate forming a semiconductor element thereby obtaining connection of the element, no damage to insulation property between the abutting wirings by occurrence of leakage current and no deterioration of insulation resistance property between the abutting wirings are achieved in case that fine metal wiring is formed in a porous insulation film. The insulation barrier layer 413 is formed between an interlayer insulation film and the metal wiring, in the metal wiring structure on the substrate forming the semiconductor element. The insulation barrier layer enables to reduce leakage current between the abutting wirings and to elevate the insulation credibility.

摘要翻译： 提供一种布线结构及其制造方法，其中在形成半导体元件的基板上形成金属布线的多层布线的布线结构中，从而获得元件的连接，不会损坏绝缘性能 在多孔绝缘膜中形成细小的金属布线的情况下，可以通过发生漏电流而在邻接布线之间形成邻接布线之间的绝缘电阻特性。 在形成半导体元件的基板上的金属布线结构中，在层间绝缘膜和金属布线之间形成绝缘阻挡层413。 绝缘阻挡层能够减少邻接布线之间的泄漏电流并提高绝缘可靠性。

公开(公告)号：US07701060B2

公开(公告)日：2010-04-20

申请号：US10558367

申请日：2004-05-28

申请人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

发明人： Munehiro Tada ,  Yoshihiro Hayashi ,  Yoshimichi Harada ,  Fuminori Ito ,  Hiroto Ohtake ,  Tatsuya Usami

IPC分类号： H01L23/48

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： There are provided with a wiring structure and a method for manufacturing the same wherein in a wiring structure of multi-layered wiring in which a metal wiring is formed on a substrate forming a semiconductor element thereby obtaining connection of the element, no damage to insulation property between the abutting wirings by occurrence of leakage current and no deterioration of insulation resistance property between the abutting wirings are achieved in case that fine metal wiring is formed in a porous insulation film. The insulation barrier layer 413 is formed between an interlayer insulation film and the metal wiring, in the metal wiring structure on the substrate forming the semiconductor element. The insulation barrier layer enables to reduce leakage current between the abutting wirings and to elevate the insulation credibility.

摘要翻译： 提供一种布线结构及其制造方法，其中在形成半导体元件的基板上形成金属布线的多层布线的布线结构中，从而获得元件的连接，不会损坏绝缘性能 在多孔绝缘膜中形成细小的金属布线的情况下，可以通过发生漏电流而在邻接布线之间形成邻接布线之间的绝缘电阻特性。 在形成半导体元件的基板上的金属布线结构中，在层间绝缘膜和金属布线之间形成绝缘阻挡层413。 绝缘阻挡层能够减少邻接布线之间的泄漏电流并提高绝缘可靠性。

公开(公告)号：US06972453B2

公开(公告)日：2005-12-06

申请号：US10080848

申请日：2002-02-22

申请人： Hiroto Ohtake ,  Shinobu Saitoh ,  Munehiro Tada ,  Yoshihiro Hayashi

发明人： Hiroto Ohtake ,  Shinobu Saitoh ,  Munehiro Tada ,  Yoshihiro Hayashi

IPC分类号： H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/311 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522 ,  H01L29/76

CPC分类号： H01L21/022 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/31138 ,  H01L21/312 ,  H01L21/3122 ,  H01L21/3127 ,  H01L21/76802 ,  H01L21/76832

摘要： In a method of manufacturing a semiconductor device, with respect to a stacked film including a silicon included organic film and a silicon non-included organic film, the silicon non-included organic film is etched by using the etching gas of mixed N2 gas and H2 gas.

摘要翻译： 在制造半导体器件的方法中，对于包含硅的有机膜和未包含硅的有机膜的叠层膜，通过使用混合的N 2气体的蚀刻气体和H 2 加油站。

公开(公告)号：US08043957B2

公开(公告)日：2011-10-25

申请号：US12299375

申请日：2007-05-16

申请人： Munehiro Tada ,  Hiroto Ohtake ,  Fuminori Ito ,  Yoshihiro Hayashi ,  Hironori Yamamoto

发明人： Munehiro Tada ,  Hiroto Ohtake ,  Fuminori Ito ,  Yoshihiro Hayashi ,  Hironori Yamamoto

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L23/53295 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a multilayer wiring technology by which high adhesiveness and high insulation reliability between wirings are obtained, while maintaining effective low capacitance between wirings. A semiconductor device is characterized in that a first insulating film is an insulating film formed of at least one layer which contains a siloxane structure containing silicon, oxygen and carbon; the siloxane structure in the inner part of the first insulating film contains a larger number of carbon atoms than the number of silicon atoms; and a modified layer which containing a smaller number of carbon atoms and a larger number of oxygen atoms per unit volume than the inner part of the first insulating film is formed on at least one of an interface between the first insulating film and the metal and an interface between the first insulating film and a second insulating film.

摘要翻译： 本发明提供了一种多层布线技术，其中在布线之间保持有效的低电容的同时获得了布线之间的高粘合性和高绝缘可靠性。 半导体器件的特征在于，第一绝缘膜是由至少一层包含含有硅，氧和碳的硅氧烷结构的层形成的绝缘膜; 第一绝缘膜的内部的硅氧烷结构含有比硅原子数多的碳原子数; 并且在第一绝缘膜和金属之间的界面中的至少一个上形成有含有比第一绝缘膜的内部少的碳原子数和更多数量的单位体积的氧原子的改性层， 第一绝缘膜和第二绝缘膜之间的界面。

公开(公告)号：US07622808B2

公开(公告)日：2009-11-24

申请号：US11317399

申请日：2005-12-23

申请人： Hiroto Ohtake ,  Masayoshi Tagami ,  Munehiro Tada ,  Yoshihiro Hayashi

发明人： Hiroto Ohtake ,  Masayoshi Tagami ,  Munehiro Tada ,  Yoshihiro Hayashi

IPC分类号： H01L23/48

CPC分类号： H01L21/76813 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3143 ,  H01L21/31633 ,  H01L21/76811 ,  H01L21/76816 ,  H01L21/76831 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A semiconductor device includes a first interconnection layer and a interlayer insulating layer. The first interconnection layer is formed on a upper side of a substrate, and includes a first interconnection. The interlayer insulating layer is formed on the first interconnection layer, and includes a via connected with the first interconnection at one end of the via and a second interconnection connected with the via at another end of the via. The interlayer insulating layer has a relative dielectric constant lower than that of a silicon oxide film. An upper portion of the interlayer insulating layer includes a silicon-oxide film, a silicon nitride film and a silicon oxide film in order from a lower portion.

摘要翻译： 半导体器件包括第一互连层和层间绝缘层。 第一互连层形成在基板的上侧，并且包括第一互连。 层间绝缘层形成在第一互连层上，并且包括在通孔的一端与第一互连连接的通孔和在通孔的另一端与通孔相连的第二互连。 层间绝缘层的相对介电常数比氧化硅膜低。 层间绝缘层的上部从下部开始依次包括氧化硅膜，氮化硅膜和氧化硅膜。

公开(公告)号：US20090267198A1

公开(公告)日：2009-10-29

申请号：US12299375

申请日：2007-05-16

申请人： Munehiro Tada ,  Hiroto Ohtake ,  Fuminori Ito ,  Yoshihiro Hayashi ,  Hironori Yamamoto

发明人： Munehiro Tada ,  Hiroto Ohtake ,  Fuminori Ito ,  Yoshihiro Hayashi ,  Hironori Yamamoto

IPC分类号： H01L29/06 ,  H01L21/768 ,  B05C11/00 ,  C23F1/08

CPC分类号： H01L23/53295 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a multilayer wiring technology by which high adhesiveness and high insulation reliability between wirings are obtained, while maintaining effective low capacitance between wirings. A semiconductor device is characterized in that a first insulating film is an insulating film formed of at least one layer which contains a siloxane structure containing silicon, oxygen and carbon; the siloxane structure in the inner part of the first insulating film contains a larger number of carbon atoms than the number of silicon atoms; and a modified layer which containing a smaller number of carbon atoms and a larger number of oxygen atoms per unit volume than the inner part of the first insulating film is formed on at least one of an interface between the first insulating film and the metal and an interface between the first insulating film and a second insulating film.

摘要翻译： 本发明提供了一种多层布线技术，其中在布线之间保持有效的低电容的同时获得了布线之间的高粘合性和高绝缘可靠性。 半导体器件的特征在于，第一绝缘膜是由至少一层包含含有硅，氧和碳的硅氧烷结构的层形成的绝缘膜; 第一绝缘膜的内部的硅氧烷结构含有比硅原子数多的碳原子数; 并且在第一绝缘膜和金属之间的界面中的至少一个上形成有含有比第一绝缘膜的内部少的碳原子数和更多数量的单位体积的氧原子的改性层， 第一绝缘膜和第二绝缘膜之间的界面。

公开(公告)号：US20090014887A1

公开(公告)日：2009-01-15

申请号：US12160149

申请日：2007-01-05

申请人： Hiroto Ohtake ,  Munehiro Tada ,  Makoto Ueki ,  Yoshihiro Hayashi

发明人： Hiroto Ohtake ,  Munehiro Tada ,  Makoto Ueki ,  Yoshihiro Hayashi

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76808 ,  H01L21/76813 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed in the hard mask film, and a grove is formed in the insulating film structure using this as a mask. According to the prior art, the via side wall is oxidized equally severely in the both processes. The trench side wall is oxidized severely in the via first process according to the prior art, whereas, according to the present invention, the oxidation thereof is suppressed to such an extent that an almost non-oxidized state can be created.

摘要翻译： 在具有阻挡绝缘膜，通孔层间绝缘膜，布线层间绝缘膜和硬掩模膜的绝缘膜结构中，依次层叠在下层布线上，在绝缘膜结构中形成通孔图案，然后， 在硬掩模膜中形成凹槽图案，并且使用其作为掩模在绝缘膜结构中形成凹槽。 根据现有技术，通孔侧壁在两个过程中同样严重氧化。 在根据现有技术的通孔第一工艺中，沟槽侧壁被严重氧化，而根据本发明，其氧化被抑制到几乎可以产生几乎非氧化状态的程度。