公开(公告)号：US5490041A

公开(公告)日：1996-02-06

申请号：US222487

申请日：1994-04-04

申请人： Hitonobu Furukawa ,  Hayami Matsunaga ,  Yoshikazu Suehiro ,  Masao Iwata ,  Takeo Yasuho ,  Izumi Okamoto ,  Kazuo Takeda ,  Shuji Ida

发明人： Hitonobu Furukawa ,  Hayami Matsunaga ,  Yoshikazu Suehiro ,  Masao Iwata ,  Takeo Yasuho ,  Izumi Okamoto ,  Kazuo Takeda ,  Shuji Ida

IPC分类号： H01L25/18 ,  H01L25/04 ,  H01L25/065 ,  H01L25/10 ,  H01L25/11 ,  H05K7/02 ,  H05K7/06

CPC分类号： H05K7/023 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2225/06551 ,  H01L2225/06579 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/1627 ,  H01L2924/3011

摘要： A plurality of memory modules are stacked so as to form a multilayer integrated memory circuit. All of the memory modules have a plurality of bare memory IC chips mounted thereon, and have the same structure, the same circuit configuration and the same terminal arrangement in lead frames with each other. Each of the memory modules to be stacked in each layer is rotated by 90.degree., 180.degree. or 270.degree. before being stacked and connected to each other. Thus, in the multi-layered memory circuit, it is possible that signals can be selectively input/output to/from a particular layer in the multilayer structure, although the lead terminals of each of memory modules has the same configuration and the same arrangement with each other. As a result, a small-size integrated memory circuit device with a large memory-capacity can be provided, which can be fabricated easily and efficiently. A higher processing speed of digital computers can be also achieved.

摘要翻译： 堆叠多个存储器模块以形成多层集成存储器电路。 所有存储器模块具有安装在其上的多个裸存储器IC芯片，并且具有与引线框架相同的结构，相同的电路结构和相同的端子布置。 堆叠在每个层中的每个存储模块在堆叠并相互连接之前旋转90°，180°或270°。 因此，在多层存储器电路中，虽然各存储器模块的引线端子具有相同的结构和相同的配置，但是与多层结构中的特定层可以选择性地输入/输出信号 彼此。 结果，可以提供容易且有效地制造的具有大的存储容量的小尺寸集成存储器电路器件。 也可以实现数字计算机的更高的处理速度。

公开(公告)号：US5742097A

公开(公告)日：1998-04-21

申请号：US782302

申请日：1997-01-15

申请人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

发明人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

IPC分类号： H01L23/498 ,  H01L23/50 ,  H01L25/065 ,  H01L25/10 ,  H05K1/18 ,  H01L23/02

CPC分类号： H01L23/4985 ,  H01L23/50 ,  H01L25/0657 ,  H01L25/105 ,  H05K1/181 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/10689 ,  Y02P70/611

摘要： Two modules, each of which has a plurality of memory IC chips installed therein, are stacked to form a module unit. Furthermore, a plurality of the module units are installed on a mother board so as to form a multilevel semiconductor integrated circuit device. By further stacking a specific module containing an IC chip for replacing the functions of a defective chip, a repair process can be conducted more easily and efficiently. Alternatively, instead of the module units, a plurality of TAB packages stacked in a multilayer structure are installed on the mother board. Outer leads of each of the TAB packages and terminal pads on the circuit board are respectively connected to each other in a one-to-one way. Thus, only a defective TAB package need be taken away and consequently, efficiency in the repair process further improves.

摘要翻译： 将其中安装有多个存储器IC芯片的两个模块堆叠形成模块单元。 此外，多个模块单元安装在母板上，以形成多电平半导体集成电路器件。 通过进一步堆叠包含用于替换缺陷芯片的功能的IC芯片的特定模块，可以更容易且有效地进行修复处理。 或者，代替模块单元，堆叠在多层结构中的多个TAB封装被安装在母板上。 电路板上的每个TAB封装和端子焊盘的外引线分别以一对一的方式彼此连接。 因此，仅需要带走有缺陷的TAB封装，因此修复过程的效率进一步提高。

公开(公告)号：US5652462A

公开(公告)日：1997-07-29

申请号：US505611

申请日：1995-07-21

申请人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

发明人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

IPC分类号： H01L23/498 ,  H01L23/50 ,  H01L25/065 ,  H01L25/10 ,  H05K1/18 ,  H01L23/02

CPC分类号： H01L23/4985 ,  H01L23/50 ,  H01L25/0657 ,  H01L25/105 ,  H05K1/181 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/10689 ,  Y02P70/611

摘要： Two modules, each of which has a plurality of memory IC chips installed therein, are stacked to form a module unit. Furthermore, a plurality of the module units are installed on a mother board so as to form a multilevel semiconductor integrated circuit device. By further stacking a specific module containing an IC chip for replacing the functions of a defective chip, a repair process can be conducted more easily and efficiently. Alternatively, instead of the module units, a plurality of TAB packages stacked in a multilayer structure are installed on the mother board. Outer leads of each of the TAB packages and terminal pads on the circuit board are respectively connected to each other in a one-to-one way. Thus, only a defective TAB package need be taken away and consequently, efficiency in the repair process further improves.

摘要翻译： 将其中安装有多个存储器IC芯片的两个模块堆叠形成模块单元。 此外，多个模块单元安装在母板上，以形成多电平半导体集成电路器件。 通过进一步堆叠包含用于替换缺陷芯片的功能的IC芯片的特定模块，可以更容易且有效地进行修复处理。 或者，代替模块单元，堆叠在多层结构中的多个TAB封装被安装在母板上。 电路板上的每个TAB封装和端子焊盘的外引线分别以一对一的方式彼此连接。 因此，仅需要带走有缺陷的TAB封装，因此修复过程的效率进一步提高。

公开(公告)号：US5400599A

公开(公告)日：1995-03-28

申请号：US987215

申请日：1992-12-08

申请人： Hiroshi Sekiya ,  Masahisa Otake ,  Junji Matsue ,  Ryouichi Katohno ,  Toshikazu Ishihara ,  Izumi Okamoto ,  Yoshiaki Kurosawa ,  Mitsuhiko Ishino

发明人： Hiroshi Sekiya ,  Masahisa Otake ,  Junji Matsue ,  Ryouichi Katohno ,  Toshikazu Ishihara ,  Izumi Okamoto ,  Yoshiaki Kurosawa ,  Mitsuhiko Ishino

IPC分类号： F02G1/044 ,  F02G1/053 ,  F02G1/057 ,  F25B9/14 ,  F25B9/00

CPC分类号： F02G1/057 ,  F02G1/0445 ,  F02G1/053 ,  F25B9/14 ,  F02G2250/18 ,  F02G2253/02 ,  F02G2253/03 ,  F02G2270/50

摘要： Gas displacement volumes of a high temperature chamber and a middle temperature chamber in a high temperature portion of a hot gas machine are different. Alternatively, a gas displacement volume of a low temperature chamber and a middle temperature chamber in a low temperature portion are different.

摘要翻译： 在热气机的高温部分中的高温室和中温室的气体排量是不同的。 或者，低温部的低温室和中温室的气体排出容积不同。

公开(公告)号：US4595934A

公开(公告)日：1986-06-17

申请号：US617942

申请日：1984-06-06

申请人： Shoji Arai ,  Izumi Okamoto ,  Masayoshi Mihata

发明人： Shoji Arai ,  Izumi Okamoto ,  Masayoshi Mihata

IPC分类号： B41J2/345 ,  G01D15/10 ,  B41J3/20

CPC分类号： B41J2/345 ,  G01D15/10

摘要： An improved thermal head for thermal recording includes an array of a plurality of heat generator elements arranged in a direction first, and a plurality of semiconductor chips each thereof including a plurality of transistors for selectively energizing the plural heat generator elements. An array of electrode terminals including the individual electrode terminals of the plurality of transistors each thereof being connected to one electrode of each of the plurality of heat generator elements are formed on one of the major surfaces of each of the semiconductor chips in a second direction substantially perpendicular to the first direction of the heat generator element array. The thermal head further comprises a flexible film associated with each of the semiconductor chips and having a slot or recess surrounding the electrode terminal array. One of the major surfaces of the flexible film is placed on the major surface of the semiconductor chip on which the electrode terminal array is disposed, and a plurality of leads having one end thereof connected respectively to the electrode terminals are disposed on the other major surface of the flexible film substantially in parallel with the heat generator element array. By virtue of the above structure, the thermal head is suitable for thermal recording with a high recording density and can be manufactured at a low cost.

摘要翻译： 用于热记录的改进的热敏头包括沿着第一方向布置的多个发热体元件的阵列，并且其中的多个半导体芯片包括用于选择性地激励多个发热元件的多个晶体管。 基本上在第二方向上的每个半导体芯片的一个主表面上形成包括其多个晶体管中的各个电极端子的多个电极端子阵列连接到多个发热元件中的每一个的一个电极 垂直于发热元件阵列的第一方向。 热敏头还包括与每个半导体芯片相关联的柔性膜，并且具有围绕电极端子阵列的槽或凹槽。 柔性膜的主要表面之一被放置在其上设置有电极端子阵列的半导体芯片的主表面上，并且其一端分别连接到电极端子的多个引线设置在另一个主表面上 的柔性膜基本上与发热体元件阵列平行。 通过上述结构，热敏头适用于高记录密度的热记录，可以低成本制造。