公开(公告)号：US5490041A

公开(公告)日：1996-02-06

申请号：US222487

申请日：1994-04-04

申请人： Hitonobu Furukawa ,  Hayami Matsunaga ,  Yoshikazu Suehiro ,  Masao Iwata ,  Takeo Yasuho ,  Izumi Okamoto ,  Kazuo Takeda ,  Shuji Ida

发明人： Hitonobu Furukawa ,  Hayami Matsunaga ,  Yoshikazu Suehiro ,  Masao Iwata ,  Takeo Yasuho ,  Izumi Okamoto ,  Kazuo Takeda ,  Shuji Ida

IPC分类号： H01L25/18 ,  H01L25/04 ,  H01L25/065 ,  H01L25/10 ,  H01L25/11 ,  H05K7/02 ,  H05K7/06

CPC分类号： H05K7/023 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2225/06551 ,  H01L2225/06579 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/1627 ,  H01L2924/3011

摘要： A plurality of memory modules are stacked so as to form a multilayer integrated memory circuit. All of the memory modules have a plurality of bare memory IC chips mounted thereon, and have the same structure, the same circuit configuration and the same terminal arrangement in lead frames with each other. Each of the memory modules to be stacked in each layer is rotated by 90.degree., 180.degree. or 270.degree. before being stacked and connected to each other. Thus, in the multi-layered memory circuit, it is possible that signals can be selectively input/output to/from a particular layer in the multilayer structure, although the lead terminals of each of memory modules has the same configuration and the same arrangement with each other. As a result, a small-size integrated memory circuit device with a large memory-capacity can be provided, which can be fabricated easily and efficiently. A higher processing speed of digital computers can be also achieved.

摘要翻译： 堆叠多个存储器模块以形成多层集成存储器电路。 所有存储器模块具有安装在其上的多个裸存储器IC芯片，并且具有与引线框架相同的结构，相同的电路结构和相同的端子布置。 堆叠在每个层中的每个存储模块在堆叠并相互连接之前旋转90°，180°或270°。 因此，在多层存储器电路中，虽然各存储器模块的引线端子具有相同的结构和相同的配置，但是与多层结构中的特定层可以选择性地输入/输出信号 彼此。 结果，可以提供容易且有效地制造的具有大的存储容量的小尺寸集成存储器电路器件。 也可以实现数字计算机的更高的处理速度。

公开(公告)号：US06303989B1

公开(公告)日：2001-10-16

申请号：US08596343

申请日：1996-02-16

申请人： Takeo Yasuho ,  Masao Iwata ,  Ryoichi Katsuragawa ,  Hayami Matsunaga ,  Yoshikazu Suehiro ,  Yasuhiko Yokota

发明人： Takeo Yasuho ,  Masao Iwata ,  Ryoichi Katsuragawa ,  Hayami Matsunaga ,  Yoshikazu Suehiro ,  Yasuhiko Yokota

IPC分类号： H01L2334

CPC分类号： H05K7/1092 ,  H01L25/18 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0209 ,  H05K1/0263 ,  H05K1/056 ,  H05K1/144 ,  H05K3/368 ,  H05K2201/09781 ,  H05K2201/10318 ,  H05K2201/1056 ,  H05K2201/10689 ,  H05K2201/2036 ,  H01L2924/00

摘要： The present invention relates to integrated circuit devices for use in such civilian equipments as an electronic equipment, electrical equipment, communication equipment and measuring and controlling equipment, and its object is to provide an integrated circuit device which has an excellent heat radiating characteristic. Then, in order to achieve this object, it includes, on a metal board 1, a power supply 4 and a plurality of pin terminals 5 and includes, on a multi-layer circuit wiring board 7, mounted component parts comprising a cache controller 10, a cache memory section 11, a data buffer LSI section 14, a CPU chip 8 and a connector 12; and, by mounting a reverse surface of the multi-layer circuit wiring board 7 having the mounted component parts provided thereon on the metal board 1 having the power supply 4 provided thereon through the pin terminal group 5, it is possible to provide an integrated circuit device in which the degree of integration is enhanced and the heat radiating characteristic of heat generating component parts is excellent.

摘要翻译： 本发明涉及用于诸如电子设备，电气设备，通信设备和测量和控制设备的民用设备中的集成电路装置，其目的是提供一种具有优异散热特性的集成电路装置。 而且，为了达到上述目的，在金属基板1上，包括电源4和多个引脚端子5，在多层电路布线基板7上，具有高速缓存控制器10 ，高速缓冲存储器部分11，数据缓冲器LSI部分14，CPU芯片8和连接器12; 并且通过将具有设置在其上的具有安装的组件的多层电路布线板7的反面安装在通过引脚端子组5设置在其上的电源4的金属板1上，可以提供集成电路 其中集成度增强并且发热部件的散热特性优异的装置。

公开(公告)号：US5652462A

公开(公告)日：1997-07-29

申请号：US505611

申请日：1995-07-21

申请人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

发明人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

IPC分类号： H01L23/498 ,  H01L23/50 ,  H01L25/065 ,  H01L25/10 ,  H05K1/18 ,  H01L23/02

CPC分类号： H01L23/4985 ,  H01L23/50 ,  H01L25/0657 ,  H01L25/105 ,  H05K1/181 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/10689 ,  Y02P70/611

摘要： Two modules, each of which has a plurality of memory IC chips installed therein, are stacked to form a module unit. Furthermore, a plurality of the module units are installed on a mother board so as to form a multilevel semiconductor integrated circuit device. By further stacking a specific module containing an IC chip for replacing the functions of a defective chip, a repair process can be conducted more easily and efficiently. Alternatively, instead of the module units, a plurality of TAB packages stacked in a multilayer structure are installed on the mother board. Outer leads of each of the TAB packages and terminal pads on the circuit board are respectively connected to each other in a one-to-one way. Thus, only a defective TAB package need be taken away and consequently, efficiency in the repair process further improves.

摘要翻译： 将其中安装有多个存储器IC芯片的两个模块堆叠形成模块单元。 此外，多个模块单元安装在母板上，以形成多电平半导体集成电路器件。 通过进一步堆叠包含用于替换缺陷芯片的功能的IC芯片的特定模块，可以更容易且有效地进行修复处理。 或者，代替模块单元，堆叠在多层结构中的多个TAB封装被安装在母板上。 电路板上的每个TAB封装和端子焊盘的外引线分别以一对一的方式彼此连接。 因此，仅需要带走有缺陷的TAB封装，因此修复过程的效率进一步提高。

公开(公告)号：US5742097A

公开(公告)日：1998-04-21

申请号：US782302

申请日：1997-01-15

申请人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

发明人： Hayami Matsunaga ,  Masao Iwata ,  Yoshikazu Suehiro ,  Hideo Kurokawa ,  Izumi Okamoto

IPC分类号： H01L23/498 ,  H01L23/50 ,  H01L25/065 ,  H01L25/10 ,  H05K1/18 ,  H01L23/02

CPC分类号： H01L23/4985 ,  H01L23/50 ,  H01L25/0657 ,  H01L25/105 ,  H05K1/181 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/1005 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/10689 ,  Y02P70/611

摘要： Two modules, each of which has a plurality of memory IC chips installed therein, are stacked to form a module unit. Furthermore, a plurality of the module units are installed on a mother board so as to form a multilevel semiconductor integrated circuit device. By further stacking a specific module containing an IC chip for replacing the functions of a defective chip, a repair process can be conducted more easily and efficiently. Alternatively, instead of the module units, a plurality of TAB packages stacked in a multilayer structure are installed on the mother board. Outer leads of each of the TAB packages and terminal pads on the circuit board are respectively connected to each other in a one-to-one way. Thus, only a defective TAB package need be taken away and consequently, efficiency in the repair process further improves.

摘要翻译： 将其中安装有多个存储器IC芯片的两个模块堆叠形成模块单元。 此外，多个模块单元安装在母板上，以形成多电平半导体集成电路器件。 通过进一步堆叠包含用于替换缺陷芯片的功能的IC芯片的特定模块，可以更容易且有效地进行修复处理。 或者，代替模块单元，堆叠在多层结构中的多个TAB封装被安装在母板上。 电路板上的每个TAB封装和端子焊盘的外引线分别以一对一的方式彼此连接。 因此，仅需要带走有缺陷的TAB封装，因此修复过程的效率进一步提高。