公开(公告)号：US09786644B2

公开(公告)日：2017-10-10

申请号：US15168240

申请日：2016-05-30

申请人： Hongbin Shi ,  Hojeong Moon ,  Kang Joon Lee

发明人： Hongbin Shi ,  Hojeong Moon ,  Kang Joon Lee

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/10 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L25/105 ,  H01L2224/11849 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/1357 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： Provided is a method of fabricating a semiconductor package. The method include providing a lower package with an inner solder ball, providing a conductive material on the inner solder ball to form an outer solder ball enclosing the inner solder ball, providing an upper package with an upper solder ball, on the lower package, performing a first process at a first temperature to join the upper solder ball to the outer solder ball, and performing a second process at a second temperature to unite the upper, inner, and outer solder balls into a connection terminal.

公开(公告)号：US09985008B2

公开(公告)日：2018-05-29

申请号：US15423611

申请日：2017-02-03

申请人： Hongbin Shi ,  Junho Lee

发明人： Hongbin Shi ,  Junho Lee

IPC分类号： H01L21/00 ,  H01L25/10 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L25/105 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/81143 ,  H01L2224/81815 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082

摘要： A method of fabricating a semiconductor package includes providing a lower semiconductor package including a lower package substrate, and a lower dummy ball and a lower solder ball on a top surface of the lower package substrate, providing an upper semiconductor package including an upper package substrate, and an upper dummy ball and an upper solder ball on a bottom surface of the upper package substrate, joining the upper dummy ball to the lower dummy ball at a first temperature to form a solder joint, and joining the upper solder ball to the lower solder ball at a second temperature to form a connection terminal.

公开(公告)号：US09953964B2

公开(公告)日：2018-04-24

申请号：US15240183

申请日：2016-08-18

申请人： Hongbin Shi ,  Soonbum Kim ,  Junho Lee

发明人： Hongbin Shi ,  Soonbum Kim ,  Junho Lee

IPC分类号： H01L21/00 ,  H01L25/10 ,  H01L25/00

CPC分类号： H01L25/105 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/48227 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012

摘要： A method for manufacturing a semiconductor package including providing a first semiconductor package including a first package substrate and a first solder ball, the first package substrate having a first surface and a second surface opposite to the first surface, the first solder ball on the first surface, providing a second semiconductor package including a second package substrate and a second solder ball, the second package substrate having a third surface and a fourth surface opposite to the third surface, the second solder ball on the third surface, forming a depression in the first solder ball, applying flux to the first solder ball to fill the depression, aligning the first semiconductor package and the second semiconductor package with each other such that the second solder ball is inserted into the depression, and performing a reflow process to combine the first solder ball with the second solder ball may be provided.