公开(公告)号：US08158512B2

公开(公告)日：2012-04-17

申请号：US12141040

申请日：2008-06-17

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Sean Fuxiong Zhang

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Sean Fuxiong Zhang

IPC分类号： H01L21/203

CPC分类号： C23C16/45529 ,  H01L21/28282 ,  H01L29/1608 ,  H01L29/42348 ,  H01L29/792

摘要： There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within a ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; forming a first dielectric layer to cover the discrete compound monolayer; forming a second third monolayer above first dielectric layer; and forming a second discrete compound monolayer; and forming a second dielectric layer to cover the second discrete compound monolayer above the first dielectric layer. There is also provided a semiconductor device formed by the ALD method.

摘要翻译： 提供一种制造半导体器件的方法，包括以下步骤：在ALD室内使第一前体气体流到半导体衬底，以在半导体衬底上形成第一离散单层; 将惰性吹扫气体流入ALD室内的半导体衬底; 使第二前体气体流到ALD室以与形成第一单层的第一前体气体反应，从而形成第一离散化合物单层; 并流动惰性吹扫气体; 形成第一电介质层以覆盖离散化合物单层; 在第一介电层上形成第二第三单层; 并形成第二离散化合物单层; 以及形成第二电介质层以覆盖所述第一电介质层上方的所述第二离散化合物单层。 还提供了通过ALD方法形成的半导体器件。

公开(公告)号：US07709386B2

公开(公告)日：2010-05-04

申请号：US12141045

申请日：2008-06-17

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

IPC分类号： H01L21/44

CPC分类号： H01L21/0228 ,  C23C16/45529 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/31645 ,  H01L21/318 ,  H01L21/3185 ,  H01L27/11563

摘要： There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within the ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; and forming a second discrete compound monolayer above the semiconductor substrate by the same process as that for forming the first discrete compound monolayer. There is also provided a semiconductor device in which the charge trapping layer is a dielectric layer containing the first and second discrete compound monolayers formed by the ALD method.

摘要翻译： 提供了一种制造半导体器件的方法，包括以下步骤：将第一前体气体流到ALD室内的半导体衬底，以在半导体衬底上形成第一离散单层; 将惰性吹扫气体流入ALD室内的半导体衬底; 使第二前体气体流到ALD室以与形成第一单层的第一前体气体反应，从而形成第一离散化合物单层; 并流动惰性吹扫气体; 以及通过与形成第一离散化合物单层相同的方法在半导体衬底上方形成第二离散化合物单层。 还提供了一种半导体器件，其中电荷捕获层是包含通过ALD法形成的第一和第二离散化合物单层的介电层。

公开(公告)号：US20080315293A1

公开(公告)日：2008-12-25

申请号：US12141045

申请日：2008-06-17

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

IPC分类号： H01L21/28 ,  H01L29/792

CPC分类号： H01L21/0228 ,  C23C16/45529 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/31645 ,  H01L21/318 ,  H01L21/3185 ,  H01L27/11563

摘要： There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within the ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; and forming a second discrete compound monolayer above the semiconductor substrate by the same process as that for forming the first discrete compound monolayer. There is also provided a semiconductor device in which the charge trapping layer is a dielectric layer containing the first and second discrete compound monolayers formed by the ALD method.

摘要翻译： 提供一种制造半导体器件的方法，包括以下步骤：将第一前体气体流到ALD室内的半导体衬底，以在半导体衬底上形成第一离散单层; 将惰性吹扫气体流入ALD室内的半导体衬底; 使第二前体气体流到ALD室以与形成第一单层的第一前体气体反应，从而形成第一离散化合物单层; 并流动惰性吹扫气体; 以及通过与形成第一离散化合物单层相同的方法在半导体衬底上方形成第二离散化合物单层。 还提供了一种半导体器件，其中电荷捕获层是包含通过ALD法形成的第一和第二离散化合物单层的电介质层。

公开(公告)号：US20080315295A1

公开(公告)日：2008-12-25

申请号：US12132459

申请日：2008-06-03

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

IPC分类号： H01L29/792 ,  H01L21/311

CPC分类号： C23C16/04 ,  C23C16/45527 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/3185

摘要： Disclosed are atomic layer deposition method and a semiconductor device including the atomic layer, including the steps: placing a semiconductor substrate in an atomic layer deposition chamber; feeding a first precursor gas to the semiconductor substrate within the chamber to form a first discrete monolayer on the semiconductor substrate; feeding an inert purge gas to the semiconductor substrate within the chamber to remove the first precursor gas which has not formed the first discrete monolayer on the semiconductor substrate; feeding a second precursor gas to the chamber to react with the first precursor gas which has formed the first discrete monolayer, forming a discrete atomic size islands; and feeding an inert purge gas to the semiconductor substrate within the chamber to remove the second precursor gas which has not reacted with the first precursor gas and byproducts produced by the reaction between the first and the second precursor gases.

摘要翻译： 公开了原子层沉积方法和包括原子层的半导体器件，包括以下步骤：将半导体衬底放置在原子层沉积室中; 将第一前体气体供给到腔室内的半导体衬底，以在半导体衬底上形成第一离散单层; 向腔室内的半导体衬底供给惰性清洗气体以去除在半导体衬底上未形成第一离散单层的第一前体气体; 将第二前体气体供给到所述室中以与形成所述第一离散单层的所述第一前体气体反应，形成离散的原子尺寸岛; 以及将惰性吹扫气体供给到室内的半导体衬底以除去未与第一前体气体反应的第二前体气体和由第一和第二前体气体之间的反应产生的副产物。

公开(公告)号：US20080315292A1

公开(公告)日：2008-12-25

申请号：US12141040

申请日：2008-06-17

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Seanfuxiong Zhang

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Seanfuxiong Zhang

IPC分类号： H01L21/28 ,  H01L29/792

CPC分类号： C23C16/45529 ,  H01L21/28282 ,  H01L29/1608 ,  H01L29/42348 ,  H01L29/792

摘要： There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within a ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; forming a first dielectric layer to cover the discrete compound monolayer; forming a second third monolayer above first dielectric layer; and forming a second discrete compound monolayer; and forming a second dielectric layer to cover the second discrete compound monolayer above the first dielectric layer. There is also provided a semiconductor device formed by the ALD method.

摘要翻译： 提供一种制造半导体器件的方法，包括以下步骤：在ALD室内使第一前体气体流到半导体衬底，以在半导体衬底上形成第一离散单层; 将惰性吹扫气体流入ALD室内的半导体衬底; 使第二前体气体流到ALD室以与形成第一单层的第一前体气体反应，从而形成第一离散化合物单层; 并流动惰性吹扫气体; 形成第一电介质层以覆盖离散化合物单层; 在第一介电层上形成第二第三单层; 并形成第二离散化合物单层; 以及形成第二电介质层以覆盖所述第一电介质层上方的所述第二离散化合物单层。 还提供了通过ALD方法形成的半导体器件。

公开(公告)号：US08273639B2

公开(公告)日：2012-09-25

申请号：US12132459

申请日：2008-06-03

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

IPC分类号： H01L21/20

CPC分类号： C23C16/04 ,  C23C16/45527 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/3185

摘要： Disclosed are atomic layer deposition method and a semiconductor device including the atomic layer, including the steps: placing a semiconductor substrate in an atomic layer deposition chamber; feeding a first precursor gas to the semiconductor substrate within the chamber to form a first discrete monolayer on the semiconductor substrate; feeding an inert purge gas to the semiconductor substrate within the chamber to remove the first precursor gas which has not formed the first discrete monolayer on the semiconductor substrate; feeding a second precursor gas to the chamber to react with the first precursor gas which has formed the first discrete monolayer, forming a discrete atomic size islands; and feeding an inert purge gas to the semiconductor substrate within the chamber to remove the second precursor gas which has not reacted with the first precursor gas and byproducts produced by the reaction between the first and the second precursor gases.

摘要翻译： 公开了原子层沉积方法和包括原子层的半导体器件，包括以下步骤：将半导体衬底放置在原子层沉积室中; 将第一前体气体供给到腔室内的半导体衬底，以在半导体衬底上形成第一离散单层; 向腔室内的半导体衬底供给惰性清洗气体以去除在半导体衬底上未形成第一离散单层的第一前体气体; 将第二前体气体供给到所述室中以与形成所述第一离散单层的所述第一前体气体反应，形成离散的原子尺寸岛; 以及将惰性吹扫气体供给到室内的半导体衬底以除去未与第一前体气体反应的第二前体气体和由第一和第二前体气体之间的反应产生的副产物。

公开(公告)号：US20120168853A1

公开(公告)日：2012-07-05

申请号：US13419943

申请日：2012-03-14

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Seanfuxiong Zhang

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Seanfuxiong Zhang

IPC分类号： H01L29/792

CPC分类号： H01L29/792 ,  C23C16/45529 ,  H01L29/1608 ,  H01L29/40117 ,  H01L29/42348

摘要： A semiconductor non-volatile memory (NVM) device, comprising: a semiconductor substrate; a three-layer stack structure of medium layer-charge trapping layer-medium layer disposed on the semiconductor substrate; a gate disposed above the three-layer stack structure; a source and a drain disposed in the semiconductor substrate at either side of the three-layer stack structure; wherein the charge trapping layer is a dielectric layer containing one or more discrete compound clusters formed by atomic layer deposition (ALD) method.

摘要翻译： 一种半导体非易失性存储器（NVM）器件，包括：半导体衬底; 设置在半导体衬底上的中层电荷俘获层 - 介质层的三层堆叠结构; 设置在三层堆叠结构上方的栅极; 在三层堆叠结构的任一侧设置在半导体衬底中的源极和漏极; 其中电荷捕获层是包含通过原子层沉积（ALD）方法形成的一个或多个离散化合物簇的电介质层。

公开(公告)号：US09012286B2

公开(公告)日：2015-04-21

申请号：US13445428

申请日：2012-04-12

申请人： Min-Hwa Chi

发明人： Min-Hwa Chi

IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L29/10

CPC分类号： H01L21/823821 ,  H01L29/1054 ,  H01L29/66818

摘要： Disclosed herein are various methods of forming FinFET semiconductor devices so as to tune the threshold voltage of such devices. In one example, the method includes forming a plurality of spaced-apart trenches in a semiconducting substrate to define at least one fin (or fins) for the device, prior to forming a gate structure above the fin (or fins), performing a first epitaxial growth process to grow a first semiconductor material on exposed portions of the fin (or fins) and forming the gate structure above the first semiconductor material on the fin (or fins).

摘要翻译： 本文公开了形成FinFET半导体器件的各种方法，以调谐这些器件的阈值电压。 在一个示例中，该方法包括在半导体衬底内形成多个间隔开的沟槽，以在形成鳍片（或鳍片）之上的栅极结构之前，为器件限定至少一个翅片（或鳍片），执行第一 外延生长工艺以在翅片（或翅片）的暴露部分上生长第一半导体材料，并在翅片（或翅片）上的第一半导体材料上方形成栅极结构。

公开(公告)号：US08362528B2

公开(公告)日：2013-01-29

申请号：US12611360

申请日：2009-11-03

申请人： Min-Hwa Chi

发明人： Min-Hwa Chi

IPC分类号： H01L27/088

CPC分类号： H01L29/66477 ,  H01L21/84 ,  H01L27/1104 ,  H01L27/1203 ,  H01L29/7392

摘要： A logic switch intentionally utilizes GIDL current as its primary mechanism of operation. Voltages may be applied to a doped gate overlying and insulated from a pn junction. A first voltage initiates GIDL current, and the logic switch is bidirectionally conductive. A second voltage terminates GIDL current, but the logic switch is unidirectionally conductive. A third voltage renders the logic switch bidirectionally non-conductive. Circuits containing the logic switch are also described. These circuits include inverters, SRAM cells, voltage reference sources, and neuron logic switches. The logic switch is primarily implemented according to SOI protocols, but embodiments according to bulk protocols are described.

公开(公告)号：US08208286B2

公开(公告)日：2012-06-26

申请号：US12861622

申请日：2010-08-23

申请人： Min-Hwa Chi ,  Deyuan Xiao

发明人： Min-Hwa Chi ,  Deyuan Xiao

IPC分类号： G11C11/00 ,  G11C11/36 ,  H01L21/02

CPC分类号： G11C13/0007 ,  G11C11/5685 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C16/0475 ,  G11C2013/0054 ,  G11C2013/0073 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/2436

摘要： A random access memory includes a plurality of memory cells arrayed in bit-lines and word-lines. Each memory cell comprises a green transistor (gFET) including a gate, a source, and a drain; a switching resistor including a first terminal and a second terminal; and a reference resistor including a third terminal and a fourth terminal. The first terminal of the switching resistor and the third terminal is connected to a bit-line, the second terminal of the switching resistor is connected to the first source of the gFET, the fourth terminal of the reference resistor is connected to the second source of the gFET, and the gate of the gFET is connected to a word-line. The method of operating the RRAM includes a write operation and a read operation The write operation comprises steps of: applying a first voltage to the bit-line to perform a large voltage difference across the bit-line and the drain of the gFET, applying a second voltage to the gate of the gFET to turn on the gFET transiently, and a large current pulse flowing through the switching resistor for changing the resistance state. The read operation comprises steps of: applying a third voltage to the bit-line to perform a small voltage difference across the bit-line and the drain of the gFET, applying a second voltage to the word-line to turn on the gFET, and comparing the current through the switching resistor with the current through the reference resistor so as to read the data stored in the memory cell.

摘要翻译： 随机存取存储器包括以位线和字线排列的多个存储单元。 每个存储单元包括包括栅极，源极和漏极的绿色晶体管（gFET）; 开关电阻器，包括第一端子和第二端子; 以及包括第三端子和第四端子的参考电阻器。 开关电阻器和第三端子的第一端子连接到位线，开关电阻器的第二端子连接到gFET的第一源极，参考电阻器的第四端子连接到第二源极 gFET和gFET的栅极连接到字线。 操作RRAM的方法包括写入操作和读取操作。写入操作包括以下步骤：向位线施加第一电压以在gFET的位线和漏极之间执行大的电压差，施加 第二电压到gFET的栅极，瞬时导通gFET，并且大电流脉冲流过开关电阻器以改变电阻状态。 读取操作包括以下步骤：将第三电压施加到位线，以在gFET的位线和漏极之间执行小的电压差，向字线施加第二电压以导通gFET;以及 将通过开关电阻的电流与通过参考电阻的电流进行比较，以读取存储在存储单元中的数据。