BiCMOS integration scheme with raised extrinsic base
    1.
    发明授权
    BiCMOS integration scheme with raised extrinsic base 有权
    BiCMOS整合方案具有突出的外在基础

    公开(公告)号:US06780695B1

    公开(公告)日:2004-08-24

    申请号:US10249563

    申请日:2003-04-18

    IPC分类号: H01L218238

    CPC分类号: H01L21/8249 H01L27/0623

    摘要: A method of forming a BiCMOS integrated circuit having a raised extrinsic base is provided. The method includes first forming a polysilicon layer atop a surface of a gate dielectric which is located atop a substrate having device areas for forming at least one bipolar transistor and device areas for forming at least one complementary metal oxide semiconductor (CMOS) transistor. The polysilicon layer is then patterned to provide a sacrificial polysilicon layer over the device areas for forming the at least one bipolar transistor and its surrounding areas, while simultaneously providing at least one gate conductor in the device areas for forming at least one CMOS transistor. At least one pair of spacers are then formed about each of the at least one gate conductor and then a portion of the sacrificial polysilicon layer over the bipolar device areas are selectively removed to provide at least one opening in the bipolar device area. At least one bipolar transistor having a raised extrinsic base is then formed in the at least one opening.

    摘要翻译: 提供一种形成具有凸起的外在基极的BiCMOS集成电路的方法。 该方法包括首先在位于具有用于形成至少一个双极晶体管的器件区域的衬底的顶部的栅极电介质的表面上方形成多晶硅层,以及用于形成至少一个互补金属氧化物半导体(CMOS)晶体管的器件区域)。 然后将多晶硅层图案化以在器件区域上提供用于形成至少一个双极晶体管及其周围区域的牺牲多晶硅层,同时在用于形成至少一个CMOS晶体管的器件区域中提供至少一个栅极导体。 然后围绕至少一个栅极导体的每一个形成至少一对间隔物,然后选择性地去除双极器件区域上的牺牲多晶硅层的一部分以在双极器件区域中提供至少一个开口。 然后在至少一个开口中形成至少一个具有凸起的非本征基极的双极晶体管。

    Nitride pedestal for raised extrinsic base HBT process
    2.
    发明授权
    Nitride pedestal for raised extrinsic base HBT process 有权
    用于提高的外在基底HBT工艺的氮化物基座

    公开(公告)号:US06777302B1

    公开(公告)日:2004-08-17

    申请号:US10250100

    申请日:2003-06-04

    IPC分类号: H01L21331

    CPC分类号: H01L29/66242 H01L29/0817

    摘要: A method of fabricating a high-performance, raised extrinsic base HBT having a narrow emitter width is provided. In accordance with the method, a patterned nitride pedestal region and inner spacers are employed to reduce the width of an emitter opening. The reduced width is achieved without the need of using advanced lithographic tools and/or advanced photomasks.

    摘要翻译: 提供了一种制造具有窄发射极宽度的高性能,凸起的非本征基极HBT的方法。 根据该方法,使用图案化的氮化物基座区域和内部间隔件来减小发射器开口的宽度。 实现了减小的宽度,而不需要使用先进的光刻工具和/或高级光掩模。

    MOTOR AND ROTOR THEREOF
    3.
    发明申请
    MOTOR AND ROTOR THEREOF 有权
    电机和转子

    公开(公告)号:US20140175932A1

    公开(公告)日:2014-06-26

    申请号:US14235617

    申请日:2011-08-29

    IPC分类号: H02K1/27

    摘要: Disclosed are a motor and a rotor thereof. Taking the distance between the two endpoints of a permanent magnet (20) of a motor rotor that are on the side away from the centre of an iron core (10) as the length L of the permanent magnet, and the distance between a line connecting the two endpoints of the permanent magnet that are on the side away from the centre of the iron core (10) and the centre point on the side of the permanent magnet that is close to the centreline of the iron core as the width H of the permanent magnet, then H/L≧1/10. By adjusting the relationship between the length L and width H of the permanent magnet, the air gap magnetic density of the permanent magnet can be effectively increased, i.e. increasing the permanent magnetic flux of the rotor in the directions of the d axis and q axis. Hence, the utilization rate of the permanent magnet and the performance of the rotor can be improved without increasing the number of permanent magnets used.

    摘要翻译: 公开了一种电机及其转子。 将离开铁芯(10)的中心的一侧的电动机转子的永久磁铁(20)的两个端点之间的距离设为永久磁铁的长度L,以及连接线 远离铁芯(10)的中心的一侧的永久磁体的两个端点和永久磁体侧的中心点接近铁芯的中心线,作为 永磁体,H /L≥1/ 10。 通过调整永磁体的长度L和宽度H之间的关系,可以有效地增加永磁体的气隙磁密度,即增加转子在d轴和q轴方向上的永久磁通量。 因此,可以提高永久磁铁的利用率和转子的性能,而不增加使用的永磁体的数量。

    MOTOR ROTOR AND MOTOR HAVING SAME
    4.
    发明申请
    MOTOR ROTOR AND MOTOR HAVING SAME 审中-公开
    电机转子和电机

    公开(公告)号:US20140167550A1

    公开(公告)日:2014-06-19

    申请号:US14235611

    申请日:2011-08-29

    IPC分类号: H02K1/27

    摘要: Disclosed are a motor rotor and a motor having same, wherein the motor rotor comprises an iron core (10) and permanent magnets (20) provided within the iron core (10), sets of mounting grooves (30) are provided in the peripheral direction of the iron core, with each set of mounting grooves comprising more than two mounting grooves (30) arranged intermittently in the radial direction of the iron core (10). The permanent magnets (20) are correspondingly embedded into the individual mounting grooves (30). The thickness of the permanent magnet (20) at the centre of the cross section thereof and perpendicular to the rotor axis is greater than the thickness at both ends thereof. The rotor optimizes the shape of the permanent magnets (20) and improves the efficiency of the motor.

    摘要翻译: 公开了一种电动机转子和具有该电动机转子的电动机,其中,所述电动机转子包括设置在所述铁芯(10)内的铁芯(10)和永磁体(20),所述安装槽(30) 其中每组安装槽包括沿着铁芯(10)的径向方向间歇地设置的多于两个的安装槽(30)。 永磁体(20)相应地嵌入到各个安装槽(30)中。 永磁体(20)的横截面中心并且与转子轴线垂直的厚度大于其两端的厚度。 转子优化永磁体(20)的形状,提高电动机的效率。

    PERMANENT MAGNET SYNCHRONOUS MOTOR
    5.
    发明申请
    PERMANENT MAGNET SYNCHRONOUS MOTOR 审中-公开
    永磁同步电机

    公开(公告)号:US20140152139A1

    公开(公告)日:2014-06-05

    申请号:US14235408

    申请日:2011-08-31

    IPC分类号: H02K1/27

    摘要: Disclosed is a permanent magnet synchronous motor comprising a stator (1) and a rotor (2), wherein the stator (1) is provided thereon with a plurality of wire slots (3) in a circumferential direction, the rotor (2) is provided therein with a plurality of sets of magnet slots (5) in a circumferential direction, with the wire slots (3) being provided therein with coils (4) and the sets of magnet slots (5) being provided therein with permanent magnets (7); the number of poles of the permanent magnets (7) on the rotor (2) is P, the spacing between two adjacent sets of magnet slots (5) is W, the tooth width of the stator (1) is Lc, and the number of the wire slots (3) on the stator (1) is S, wherein 3PW/LcS=K, and 0.15≦K≦0.85. The permanent magnet synchronous motor can reduce dependence on rare earth and improve the output torque of the permanent magnet synchronous motor.

    摘要翻译: 公开了一种永磁同步电动机,其包括定子(1)和转子(2),其中定子(1)沿圆周方向设置有多个线槽(3),转子(2)设置 其中在圆周方向上具有多组磁体槽(5),其中线槽(3)中设置有线圈(4),并且在其中设置有永磁体(7)的一组磁体槽(5) ; 转子(2)上的永磁体(7)的极数为P,相邻的两组磁体槽(5)之间的间隔为W,定子(1)的齿宽为Lc, 定子(1)上的电线槽(3)的S为S,其中3PW / LcS = K,和0.15≦̸ K≦̸ 0.85。 永磁同步电机可以减少对稀土的依赖,提高永磁同步电机的输出转矩。

    PERMANENT MAGNET SYNCHRONOUS ELECTRIC MACHINE
    6.
    发明申请
    PERMANENT MAGNET SYNCHRONOUS ELECTRIC MACHINE 有权
    永磁同步电机

    公开(公告)号:US20140145539A1

    公开(公告)日:2014-05-29

    申请号:US14235574

    申请日:2011-08-31

    IPC分类号: H02K1/27

    CPC分类号: H02K1/2766

    摘要: Disclosed is a permanent magnet synchronous electric machine, comprising a stator (1) and a rotor (2). A plurality of wire grooves (3) are provided peripherally on the stator (1), coils (4) are provided within the wire grooves (3), and a stator tooth (5) is provided between adjacent wire grooves (3). A plurality of magnetic groove sets (6) is provided peripherally within the rotor (2), each of the magnetic groove sets (6) comprising at least two magnetic steel grooves (7), with permanent magnets (8) placed within the magnetic steel grooves (7), and a magnetic channel (9) formed between the magnetic steel grooves (7). Of two adjacent magnetic channels (9), an end of one magnetic channel (9) is opposite a wire groove (3) and an end of the other magnetic channel (9) is opposite a stator tooth (5). The permanent magnet synchronous electric machine has a more steady output torque, and also reduces the noise and vibration provided during operation.

    摘要翻译: 公开了一种永磁同步电机,包括定子(1)和转子(2)。 在定子(1)周围设有多个线槽(3),线圈(4)设置在线槽(3)内,定子齿(5)设置在相邻的线槽(3)之间。 在转子(2)的周围设置有多个磁性槽组(6),每个磁性槽组(6)包括至少两个磁钢槽(7),永磁体(8)放置在磁钢 凹槽(7)和形成在磁钢槽(7)之间的磁通道(9)。 在两个相邻的磁通道(9)中,一个磁通道(9)的一端与电线槽(3)相对,另一磁通道(9)的一端与定子齿(5)相对。 永磁同步电机具有更稳定的输出转矩,并且还降低了运行中提供的噪声和振动。

    Hybrid SOI/bulk semiconductor transistors
    7.
    发明授权
    Hybrid SOI/bulk semiconductor transistors 有权
    混合SOI /体半导体晶体管

    公开(公告)号:US07923782B2

    公开(公告)日:2011-04-12

    申请号:US10708378

    申请日:2004-02-27

    IPC分类号: H01L27/01 H01L27/12

    摘要: Channel depth in a field effect transistor is limited by an intra-layer structure including a discontinuous film or layer formed within a layer or substrate of semiconductor material. Channel depth can thus be controlled much in the manner of SOI or UT-SOI technology but with less expensive substrates and greater flexibility of channel depth control while avoiding floating body effects characteristic of SOI technology. The profile or cross-sectional shape of the discontinuous film may be controlled to an ogee or staircase shape to improve short channel effects and reduce source/drain and extension resistance without increase of capacitance. Materials for the discontinuous film may also be chosen to impose stress on the transistor channel from within the substrate or layer and provide increased levels of such stress to increase carrier mobility. Carrier mobility may be increased in combination with other meritorious effects.

    摘要翻译: 场效应晶体管中的沟道深度由包括在半导体材料的层或衬底内形成的不连续膜或层的层内结构限制。 因此,可以以SOI或UT-SOI技术的方式控制通道深度,但是具有较便宜的衬底和更大的通道深度控制的灵活性,同时避免SOI技术的浮体效应特性。 不连续膜的轮廓或横截面形状可以被控制为奥格或阶梯形状,以改善短通道效应,并且在不增加电容的情况下降低源极/漏极和延伸电阻。 也可以选择用于不连续膜的材料以在衬底或层内从晶体管沟道施加应力,并提供增加的这种应力水平以增加载流子迁移率。 携带者的流动性可能会与其他有利的影响相结合。

    ION IMPLANTATION FOR SUPPRESSION OF DEFECTS IN ANNEALED SiGe LAYERS
    8.
    发明申请
    ION IMPLANTATION FOR SUPPRESSION OF DEFECTS IN ANNEALED SiGe LAYERS 有权
    用于抑制退火SiGe层中的缺陷的离子植入

    公开(公告)号:US20100032684A1

    公开(公告)日:2010-02-11

    申请号:US12539248

    申请日:2009-08-11

    摘要: A method for fabricating substantially relaxed SiGe alloy layers with a reduced planar defect density is disclosed The method of the present invention includes forming a strained Ge-containing layer on a surface of a Si-containing substrate; implanting ions at or below the Ge-containing layer/Si-containing substrate interface and heating to form a substantially relaxed SiGe alloy layer that has a reduced planar defect density. A substantially relaxed SiGe-on-insulator substrate material having a SiGe layer with a reduced planar defect density as well as heterostructures containing the same are also provided.

    摘要翻译: 公开了一种制造具有减小的平面缺陷密度的基本上松弛的SiGe合金层的方法。本发明的方法包括在含Si衬底的表面上形成应变的含Ge层; 在含锗层/含Si衬底界面处或下方注入离子,并加热以形成具有减小的平面缺陷密度的基本上松弛的SiGe合金层。 还提供了具有具有减小的平面缺陷密度的SiGe层以及含有该SiGe层的异质结构的基本上松弛的绝缘体上硅衬底材料。

    ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIFFUSION
    9.
    发明申请
    ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIFFUSION 有权
    通过外延界面有限扩散形成的超声结构

    公开(公告)号:US20080233687A1

    公开(公告)日:2008-09-25

    申请号:US12132698

    申请日:2008-06-04

    IPC分类号: H01L21/336

    摘要: A method of forming a field effect transistor creates shallower and sharper junctions, while maximizing dopant activation in processes that are consistent with current manufacturing techniques. More specifically, the invention increases the oxygen content of the top surface of a silicon substrate. The top surface of the silicon substrate is preferably cleaned before increasing the oxygen content of the top surface of the silicon substrate. The oxygen content of the top surface of the silicon substrate is higher than other portions of the silicon substrate, but below an amount that would prevent epitaxial growth. This allows the invention to epitaxially grow a silicon layer on the top surface of the silicon substrate. Further, the increased oxygen content substantially limits dopants within the epitaxial silicon layer from moving into the silicon substrate.

    摘要翻译: 形成场效应晶体管的方法产生更浅和更尖的结,同时在与当前制造技术一致的工艺中最大化掺杂剂活化。 更具体地,本发明增加了硅衬底的顶表面的氧含量。 优选在增加硅衬底的顶表面的氧含量之前清洁硅衬底的顶表面。 硅衬底的顶表面的氧含量高于硅衬底的其它部分,但低于防止外延生长的量。 这允许本发明在硅​​衬底的顶表面上外延生长硅层。 此外,增加的氧含量基本上限制外延硅层内的掺杂剂移动到硅衬底中。

    Hybrid SOI-Bulk Semiconductor Transistors
    10.
    发明申请
    Hybrid SOI-Bulk Semiconductor Transistors 失效
    混合SOI-体半导体晶体管

    公开(公告)号:US20080090366A1

    公开(公告)日:2008-04-17

    申请号:US11870436

    申请日:2007-10-11

    IPC分类号: H01L21/336

    摘要: Channel depth in a field effect transistor is limited by an intra-layer structure including a discontinuous film or layer formed within a layer or substrate of semiconductor material. Channel depth can thus be controlled much in the manner of SOI or UT-SOI technology but with less expensive substrates and greater flexibility of channel depth control while avoiding floating body effects characteristic of SOI technology. The profile or cross-sectional shape of the discontinuous film may be controlled to an ogee or staircase shape to improve short channel effects and reduce source/drain and extension resistance without increase of capacitance. Materials for the discontinuous film may also be chosen to impose stress on the transistor channel from within the substrate or layer and provide increased levels of such stress to increase carrier mobility. Carrier mobility may be increased in combination with other meritorious effects.

    摘要翻译: 场效应晶体管中的沟道深度由包括在半导体材料的层或衬底内形成的不连续膜或层的层内结构限制。 因此,可以以SOI或UT-SOI技术的方式控制通道深度,但是具有较便宜的衬底和更大的通道深度控制的灵活性,同时避免SOI技术的浮体效应特性。 不连续膜的轮廓或横截面形状可以被控制为奥格或阶梯形状,以改善短通道效应,并且在不增加电容的情况下降低源极/漏极和延伸电阻。 也可以选择用于不连续膜的材料以在衬底或层内从晶体管沟道施加应力,并提供增加的这种应力水平以增加载流子迁移率。 携带者的流动性可能会与其他有利的影响相结合。