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1.发明申请METAL OXIDE FIELD EFFECT TRANSISTOR WITH A SHARP HALO AND A METHOD OF FORMING THE TRANSISTOR 有权具有夏普HALO的金属氧化物场效应晶体管和形成晶体管的方法公开(公告)号：US20070275510A1
公开(公告)日：2007-11-29
申请号：US11420318
申请日：2006-05-25
申请人： Huajie Chen , Judson R. Holt , Rangarajan Jagannathan , Wesley C. Natzle , Michael R. Sievers , Richard S. Wise
发明人： Huajie Chen , Judson R. Holt , Rangarajan Jagannathan , Wesley C. Natzle , Michael R. Sievers , Richard S. Wise
IPC分类号： H01L21/8232 , H01L21/8234 , H01L21/335
CPC分类号： H01L29/66636 , H01L29/6659 , H01L29/7833
摘要： Disclosed are embodiments of a MOSFET with defined halos that are bound to defined source/drain extensions and a method of forming the MOSFET. A semiconductor layer is etched to form recesses that undercut a gate dielectric layer. A low energy implant forms halos. Then, a COR pre-clean is performed and the recesses are filled by epitaxial deposition. The epi can be in-situ doped or subsequently implanted to form source/drain extensions. Alternatively, the etch is immediately followed by the COR pre-clean, which is followed by epitaxial deposition to fill the recesses. During the epitaxial deposition process, the deposited material is doped to form in-situ doped halos and, then, the dopant is switched to form in-situ doped source/drain extensions adjacent to the halos. Alternatively, after the in-situ doped halos are formed the deposition process is performed without dopants and an implant is used to form source/drain extensions.
摘要翻译： 公开了具有限定的限定的卤素的MOSFET的实施例，其限定的源极/漏极扩展部分以及形成MOSFET的方法。 蚀刻半导体层以形成切割栅极介电层的凹部。 低能量植入物形成晕轮。 然后，执行COR预清洁，并且通过外延沉积填充凹部。 外延可以被原位掺杂或随后植入以形成源/漏扩展。 或者，蚀刻之后紧接着是COR预清洁，随后进行外延沉积以填充凹部。 在外延沉积工艺期间，沉积的材料被掺杂以形成原位掺杂的光晕，然后切换掺杂剂以形成邻近光晕的原位掺杂的源极/漏极延伸。 或者，在形成原位掺杂的光晕之后，进行沉积工艺而没有掺杂剂，并且使用注入来形成源极/漏极延伸部。
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公开(公告)号：US07859013B2
公开(公告)日：2010-12-28
申请号：US11955591
申请日：2007-12-13
申请人： Huajie Chen , Judson R. Holt , Rangarajan Jagannathan , Wesley C. Natzle , Michael R. Sievers , Richard S. Wise
发明人： Huajie Chen , Judson R. Holt , Rangarajan Jagannathan , Wesley C. Natzle , Michael R. Sievers , Richard S. Wise
IPC分类号： H01L21/02
CPC分类号： H01L29/66636 , H01L29/6659 , H01L29/7833
摘要： Disclosed are embodiments of a MOSFET with defined halos that are bound to defined source/drain extensions and a method of forming the MOSFET. A semiconductor layer is etched to form recesses that undercut a gate dielectric layer. A low energy implant forms halos. Then, a COR pre-clean is performed and the recesses are filled by epitaxial deposition. The epi can be in-situ doped or subsequently implanted to form source/drain extensions. Alternatively, the etch is immediately followed by the COR pre-clean, which is followed by epitaxial deposition to fill the recesses. During the epitaxial deposition process, the deposited material is doped to form in-situ doped halos and, then, the dopant is switched to form in-situ doped source/drain extensions adjacent to the halos. Alternatively, after the in-situ doped halos are formed the deposition process is performed without dopants and an implant is used to form source/drain extensions.
摘要翻译： 公开了具有限定的限定的卤素的MOSFET的实施例，其限定的源极/漏极扩展部分以及形成MOSFET的方法。 蚀刻半导体层以形成切割栅极介电层的凹部。 低能量植入物形成晕轮。 然后，执行COR预清洁，并且通过外延沉积填充凹部。 外延可以被原位掺杂或随后植入以形成源/漏扩展。 或者，蚀刻之后紧接着是COR预清洁，随后进行外延沉积以填充凹部。 在外延沉积工艺期间，沉积的材料被掺杂以形成原位掺杂的光晕，然后切换掺杂剂以形成邻近光晕的原位掺杂的源极/漏极延伸。 或者，在形成原位掺杂的光晕之后，进行沉积工艺而没有掺杂剂，并且使用注入来形成源极/漏极延伸部。
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公开(公告)号：US07256399B2
公开(公告)日：2007-08-14
申请号：US10907591
申请日：2005-04-07
IPC分类号： G01N23/227
CPC分类号： G01N23/2273
摘要： A non-destructive in-situ elemental profiling of a layer in a set of layers method and system are disclosed. In one embodiment, a first emission of a plurality of photoelectrons is caused from the layer to be elementally profiled. An elemental profile of the layer is determined based on the emission. In another embodiment, a second emission of a plurality of photoelectrons is also received from the layer, and an elemental profile is determined by comparison of the resulting signals. A process that is altering the layer can then be controlled “on-the-fly” to obtain a desired material composition. Since the method can be employed in-situ and is non-destructive, it reduces turn around time and lowers wafer consumption. The invention also records the composition of all processed wafers, hence, removing the conventional statistical sampling problem.
摘要翻译： 公开了一组层中的层的非破坏性原位元素分析方法和系统。 在一个实施例中，多个光电子的第一次发射是从该层进行元素分析。 基于发射确定层的元素分布。 在另一个实施例中，也从该层接收多个光电子的第二次发射，并且通过比较所得到的信号来确定元素分布。 然后可以“即时”控制改变层的方法以获得所需的材料组成。 由于该方法可以原位使用并且是非破坏性的，所以可以减少周转时间并降低晶片消耗。 本发明还记录了所有加工晶片的组成，因此，去除了常规统计抽样问题。
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公开(公告)号：US20120260774A1
公开(公告)日：2012-10-18
申请号：US13388142
申请日：2011-04-18
申请人： Michael R. Sievers
发明人： Michael R. Sievers
CPC分类号： C22B58/00 , C22B7/001 , C22B30/04 , Y02P10/214
摘要： Extracting gallium and/or arsenic from materials comprising gallium arsenide is generally disclosed. In some example embodiments, a material comprising gallium arsenide may be exposed to a first heating condition to form a first exhaust. The first exhaust may be directed to an arsenic collection bed including aluminum, which may form aluminum arsenide. The material including gallium arsenide may be exposed to a second heating condition and/or a vacuum may be applied, which may form a second exhaust. The second exhaust may be directed to a gallium collection bed including aluminum, which may form gallium alloys of aluminum.
摘要翻译： 通常公开了从包含砷化镓的材料中提取镓和/或砷。 在一些示例性实施例中，包含砷化镓的材料可以暴露于第一加热条件以形成第一排气。 第一排气可以被引导到包括铝的砷收集床，其可以形成砷化铝。 包括砷化镓的材料可以暴露于第二加热条件和/或可以施加真空，其可以形成第二排气。 第二排气可以被引导到包括铝的镓收集床，其可以形成铝的镓合金。
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5.发明授权公开(公告)号：US08008209B2
公开(公告)日：2011-08-30
申请号：US11877965
申请日：2007-10-24
IPC分类号： H01L21/311 , H01L21/302 , H01L21/461 , C03C15/00 , C03C25/68 , C23F3/00
CPC分类号： H01L21/31116 , H01L21/67069 , H01L21/67248 , Y10S438/978
摘要： A technique is described whereby temperature gradients are created within a semiconductor wafer. Temperature sensitive etching and/or deposition processes are then employed. These temperature sensitive processes proceed at different rates in regions with different temperatures. To reduce pinch off in etching processes, a temperature sensitive etch process is selected and a temperature gradient is created between the surface and subsurface of a wafer such that the etching process proceeds more slowly at the surface than deeper in the wafer. This reduces “crusting” of solid reaction products at trench openings, thereby eliminating pinch off in many cases. Similar temperature-sensitive deposition processes can be employed to produce void-free high aspect ratio conductors and trench fills.
摘要翻译： 描述了在半导体晶片内产生温度梯度的技术。 然后采用温度敏感的蚀刻和/或沉积工艺。 这些温度敏感过程在不同温度的区域中以不同的速率进行。 为了减少蚀刻过程中的夹断，选择温度敏感的蚀刻工艺，并且在晶片的表面和次表面之间产生温度梯度，使得蚀刻工艺在表面上比在晶片更深地进行得更慢。 这减少了沟槽开口处的固体反应产物的“结壳”，从而在许多情况下消除了夹断。 可以使用类似的温度敏感的沉积工艺来产生无空隙的高纵横比导体和沟槽填充物。
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公开(公告)号：US07119333B2
公开(公告)日：2006-10-10
申请号：US10904438
申请日：2004-11-10
IPC分类号： G01N23/225 , H01J37/00
CPC分类号： H01J37/244 , H01J2237/2448 , H01J2237/3174
摘要： Detection of weak ion currents scattered from a sample by an ion beam is improved by the use of a multiplier system in which a conversion electrode converts incident ions to a number of secondary electrons multiplied by a multiplication factor, the secondary electrons being attracted to an electron detector by an appropriate bias. In one version, the detector is a two stage system, in which the secondary electrons strike a scintillator that emits photons that are detected in a photon detector such as a photomultiplier or a CCD.
摘要翻译： 通过使用其中转换电极将入射离子转换成多个次级电子乘以乘法因子的乘法系统来提高通过离子束从样品散射的弱离子电流的检测，二次电子被吸引到电子 检测器通过适当的偏差。 在一个版本中，检测器是两级系统，其中二次电子撞击发射在诸如光电倍增管或CCD的光子检测器中检测到的光子的闪烁体。
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公开(公告)号：US20080233709A1
公开(公告)日：2008-09-25
申请号：US11689884
申请日：2007-03-22
IPC分类号： H01L21/762 , H01L21/311
CPC分类号： H01L21/31111 , H01L21/31116 , H01L21/76224 , H01L21/76229
摘要： A method for removing a material from a trench in a semiconductor. The method includes placing the semiconductor in a vacuum chamber, admitting a reactant into the chamber at a pressure to form a film of the reactant on a surface of the material, controlling the composition and residence time of the film on the surface of the material to etch at least a portion of the material, and removing any unwanted reactant and reaction product from the chamber or the surface of the material.
摘要翻译： 一种用于从半导体中的沟槽中去除材料的方法。 该方法包括将半导体放置在真空室中，在反应物的压力下将反应物导入到腔室中以在材料的表面上形成反应物的膜，从而控制膜在材料表面上的组成和停留时间 蚀刻材料的至少一部分，并从室或材料表面去除任何不需要的反应物和反应产物。
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公开(公告)号：US07285775B2
公开(公告)日：2007-10-23
申请号：US10904883
申请日：2004-12-02
IPC分类号： G01N23/227
CPC分类号： G01N23/227 , H01L22/26
摘要： Photoelectron emissions are used to detect an endpoint of a thickness alteration of a topmost layer in a set of layers undergoing patterning. The set of layers are irradiated, which causes an emission of photoelectrons. Upon receipt of or absence of a photoelectron emission, patterning endpoint is detected.
摘要翻译： 光电子发射用于检测经历图案化的一组层中最上层的厚度变化的端点。 该层被照射，这导致光电子的发射。 在接收到或不存在光电子发射时，检测到图案化端点。
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公开(公告)号：US06843893B2
公开(公告)日：2005-01-18
申请号：US10317679
申请日：2002-12-12
IPC分类号： C10B1/00 , C23F4/00 , H01B13/00 , H01L21/302 , H01L21/3213
CPC分类号： H01L21/32134 , C23F4/00
摘要： A method and structure for an apparatus for removing metal from an integrated circuit structure is disclosed. A container holds an integrated circuit structure that has a metal portion. An electronic device connected to the container produces an electronic field proximate to a limited region of the metal portion. A first supply connected to the container supplies an oxidizing agent within the container. A solvent supply connected to the container supplies solvent to the limited region of the metal portion.
摘要翻译： 公开了一种用于从集成电路结构中去除金属的装置的方法和结构。 容器保持具有金属部分的集成电路结构。 连接到容器的电子设备产生靠近金属部分的有限区域的电子场。 连接到容器的第一供应源在容器内提供氧化剂。 连接到容器的溶剂供应源将溶剂供应到金属部分的有限区域。
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公开(公告)号：US08603216B2
公开(公告)日：2013-12-10
申请号：US13388142
申请日：2011-04-18
申请人： Michael R. Sievers
发明人： Michael R. Sievers
CPC分类号： C22B58/00 , C22B7/001 , C22B30/04 , Y02P10/214
摘要： Extracting gallium and/or arsenic from materials comprising gallium arsenide is generally disclosed. In some example embodiments, a material comprising gallium arsenide may be exposed to a first heating condition to form a first exhaust. The first exhaust may be directed to an arsenic collection bed including aluminum, which may form aluminum arsenide. The material including gallium arsenide may be exposed to a second heating condition and/or a vacuum may be applied, which may form a second exhaust. The second exhaust may be directed to a gallium collection bed including aluminum, which may form gallium alloys of aluminum.
摘要翻译： 通常公开了从包含砷化镓的材料中提取镓和/或砷。 在一些示例性实施例中，包含砷化镓的材料可以暴露于第一加热条件以形成第一排气。 第一排气可以被引导到包括铝的砷收集床，其可以形成砷化铝。 包括砷化镓的材料可以暴露于第二加热条件和/或可以施加真空，其可以形成第二排气。 第二排气可以被引导到包括铝的镓收集床，其可以形成铝的镓合金。
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