公开(公告)号：US20140368467A1

公开(公告)日：2014-12-18

申请号：US14374462

申请日：2012-03-20

申请人： Hong June Park ,  Jae Seung Lee ,  Dong Hee Yeo ,  Sang Su Lee ,  Joon Ho Cho ,  Hye Jung Kwon

发明人： Hong June Park ,  Jae Seung Lee ,  Dong Hee Yeo ,  Sang Su Lee ,  Joon Ho Cho ,  Hye Jung Kwon

IPC分类号： G06F3/044 ,  G06F3/041

CPC分类号： G06F3/044 ,  G06F3/0412

摘要： Provided is a capacitive touch sensor which includes a flat panel display for displaying an image and a touch sensor panel positioned on the flat panel display or embedded in the flat panel display. The capacitive touch sensor may include: a driving clock generator configured to generate time-periodic output signals with respect to a plurality of times, and apply the generated time-periodic output signals to the touch sensor panel and a receiver circuit unit; a driver configured to generate a driving signal of the touch sensor panel using a part of the output signals of the driving clock generator; and the receiver circuit unit configured to process noise contained in a signal received from the touch sensor panel, using the output signals.

摘要翻译： 提供一种电容式触摸传感器，其包括用于显示图像的平板显示器和位于平板显示器上或嵌入在平板显示器中的触摸传感器面板。 电容式触摸传感器可以包括：驱动时钟发生器，被配置为相对于多次产生时间周期性输出信号，并且将所产生的时间周期性输出信号施加到触摸传感器面板和接收器电路单元; 驱动器，被配置为使用所述驱动时钟发生器的输出信号的一部分来产生所述触摸传感器面板的驱动信号; 以及接收器电路单元，被配置为使用所述输出信号来处理从所述触摸传感器面板接收的信号中包含的噪声。

公开(公告)号：US09377915B2

公开(公告)日：2016-06-28

申请号：US14374462

申请日：2012-03-20

申请人： Hong June Park ,  Jae Seung Lee ,  Dong Hee Yeo ,  Sang Su Lee ,  Joon Ho Cho ,  Hye Jung Kwon

发明人： Hong June Park ,  Jae Seung Lee ,  Dong Hee Yeo ,  Sang Su Lee ,  Joon Ho Cho ,  Hye Jung Kwon

IPC分类号： G06F3/044 ,  G06F3/041

CPC分类号： G06F3/044 ,  G06F3/0412

摘要： Provided is a capacitive touch sensor which includes a flat panel display for displaying an image and a touch sensor panel positioned on the flat panel display or embedded in the flat panel display. The capacitive touch sensor may include: a driving clock generator configured to generate a plurality of time-periodic output signals by using a gate driver signal of the flat panel display, and apply the generated time-periodic output signals to the touch sensor panel and a receiver circuit unit; a driver configured to generate a driving signal of the touch sensor panel using a part of the output signals of the driving clock generator; and the receiver circuit unit configured to process noise contained in a signal received from the touch sensor panel, using the output signals.

摘要翻译： 提供一种电容式触摸传感器，其包括用于显示图像的平板显示器和位于平板显示器上或嵌入在平板显示器中的触摸传感器面板。 电容式触摸传感器可以包括：驱动时钟发生器，被配置为通过使用平板显示器的栅极驱动器信号来产生多个时间周期性输出信号，并将生成的时间周期性输出信号施加到触摸传感器面板和 接收机电路单元; 驱动器，被配置为使用所述驱动时钟发生器的输出信号的一部分来产生所述触摸传感器面板的驱动信号; 以及接收器电路单元，被配置为使用所述输出信号来处理从所述触摸传感器面板接收的信号中包含的噪声。

公开(公告)号：US08669810B2

公开(公告)日：2014-03-11

申请号：US13536925

申请日：2012-06-28

申请人： Hye Jung Kwon ,  Hong June Park

发明人： Hye Jung Kwon ,  Hong June Park

IPC分类号： H03F3/45

CPC分类号： H03K5/1515 ,  G04F10/005

摘要： When a time difference is amplified by a time difference amplifier, slew rates of internal output voltages are changed according to a phase combination of digital input signals so that a time gain is determined by a ratio between the slew rates and the slew rates can be controlled from an outside. After a voltage is charged to the level of a power supply voltage in first and second charging capacitors, the charged voltage of the first charging capacitor is decreased with a first slew rate when a first digital input signal transitions, and both charged voltages of the first and second charging capacitors are decreased with a second slew rate when a second digital input signal transitions so that both first and second digital input signals are changed from initial phases, while being compared with a reference voltage to generate first and second digital output signals.

摘要翻译： 当时差放大器放大时差时，根据数字输入信号的相位组合改变内部输出电压的转换速率，从而可以通过转换速率和转换速率之间的比率来确定时间增益 从外面。 在第一和第二充电电容器中将电压充电到电源电压的电平之后，当第一数字输入信号转变时，第一充电电容器的充电电压以第一压摆率降低，并且第一充电电容器的充电电压 并且当第二数字输入信号转变时，第二充电电容器以第二压摆率降低，使得第一和第二数字输入信号都从初始相位改变，同时与参考电压进行比较以产生第一和第二数字输出信号。

公开(公告)号：US07705690B2

公开(公告)日：2010-04-27

申请号：US11508038

申请日：2006-08-22

申请人： Hyun Bae Lee ,  Hong June Park

发明人： Hyun Bae Lee ,  Hong June Park

IPC分类号： H01P3/08

CPC分类号： H01P3/081 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09263 ,  H05K2201/09727

摘要： A serpentine guard trace for reducing far-end crosstalk of a micro strip transmission line is provided. The serpentine guard trace reduces receiving-end crosstalk caused by an electromagnetic interference of a signal of a nearby transmission line when transmitting a high speed signal through a micro strip transmission line on a printed circuit board. The serpentine guard trace is located between two nearby transmission lines and has a line width narrower than that of transmission lines for an effective serpentine structure. A characteristic impedance of the serpentine guard trace increases due to the narrow line width. Termination resistors having impedance which is the same as the characteristic impedance of the serpentine guard trace are located on both ends of the guard trace to minimize a reflection wave generated in the serpentine guard trace. The receiving-end crosstalk can be effectively reduced by using the serpentine guard trace instead of a linear guard trace. Accordingly, the serpentine guard trace can be effectively used when a high speed signal is transmitted on a printed circuit board.

摘要翻译： 提供了用于减少微带传输线的远端串扰的蛇形保护迹线。 当通过印刷电路板上的微带传输线传输高速信号时，蛇形保护迹线减少了由附近传输线的信号的电磁干扰引起的接收端串扰。 蛇形保护迹线位于两条附近的传输线之间，线宽窄于有效蛇形结构的传输线。 由于线宽窄，蛇形保护迹线的特征阻抗增加。 具有与蛇形保护迹线的特性阻抗相同的阻抗的端接电阻位于保护迹线的两端，以最小化在蛇形保护迹线中产生的反射波。 通过使用蛇形保护迹线而不是线性保护迹线，可以有效地减少接收端串扰。 因此，当在印刷电路板上传送高速信号时，可以有效地使用蛇形保护迹线。

公开(公告)号：US07274583B2

公开(公告)日：2007-09-25

申请号：US11142873

申请日：2005-06-01

申请人： Hong June Park ,  Seung Jun Bae

发明人： Hong June Park ,  Seung Jun Bae

IPC分类号： G11C5/06

CPC分类号： G11C7/1048 ,  G11C5/063

摘要： Provided is a memory system having a multi-drop bus structure. The memory system includes a bus, a memory controller in which a port connected to the bus is terminated by a resistor having a first impedance value, a connector connected to a point having the first impedance value from the memory controller on a bus line, and a memory module connected to the connector. The memory module includes a first load connected to the connector and having the first impedance value, a second load connected to the first load and having a second impedance value, a first chip in which a port connected to the second load is terminated by a resistor having the second impedance value, a via hole penetrating a printed circuit board of the memory module between the first load and the second load, a third load connected to the via hole and having the second impedance value, and a second chip in which a port connected to the third load is terminated by a resistor having the second impedance value. The first load, the second load, and a first chip are formed on a first surface of the memory module while the third load and the second chip are formed on a second surface thereof.

摘要翻译： 提供了具有多点总线结构的存储器系统。 存储器系统包括总线，存储器控制器，其中连接到总线的端口由具有第一阻抗值的电阻器端接，连接到总线上的来自存储器控制器的具有第一阻抗值的点的连接器，以及 连接到连接器的存储器模块。 存储器模块包括连接到连接器并具有第一阻抗值的第一负载，连接到第一负载的第二负载并具有第二阻抗值;第一芯片，连接到第二负载的端口由电阻器 具有第二阻抗值，穿过第一负载和第二负载之间的存储器模块的印刷电路板的通孔，连接到通孔并具有第二阻抗值的第三负载，以及第二芯片，其中端口 连接到第三负载的电阻由具有第二阻抗值的电阻器终止。 第一负载，第二负载和第一芯片形成在存储模块的第一表面上，而第三负载和第二芯片形成在其第二表面上。

公开(公告)号：US08588331B2

公开(公告)日：2013-11-19

申请号：US13166452

申请日：2011-06-22

申请人： Hae Kang Jung ,  Hong June Park

发明人： Hae Kang Jung ,  Hong June Park

IPC分类号： H03F1/34

CPC分类号： H04B3/32

摘要： A transmitter system for transmitting parallel data by compensating a crosstalk includes: first and second transmission lines parallel to each other; a first inverted crosstalk pulse generation unit configured to receive first transmission data and inverted first transmission data and output a first inverted crosstalk pulse according to a data mode; a second inverted crosstalk pulse generation unit configured to receive second transmission data transmitted in parallel to the first transmission data and inverted second transmission data and output a second inverted crosstalk pulse according to the data mode; a first addition unit configured to combine the first transmission data and the second inverted crosstalk pulse and output first compensation data to be transmitted to the first transmission line; and a second addition unit configured to combine the second transmission data and the first inverted crosstalk pulse and output second compensation data to be transmitted to the second transmission line.

摘要翻译： 用于通过补偿串扰来发送并行数据的发射机系统包括：彼此平行的第一和第二传输线; 第一反相串扰脉冲产生单元，被配置为接收第一发送数据和反向的第一发送数据，并根据数据模式输出第一反向串扰脉冲; 第二反相串扰脉冲产生单元，被配置为接收并行发送的与所述第一发送数据和反向的第二发送数据并行的第二发送数据，并根据所述数据模式输出第二反向串扰脉冲; 第一加法单元，被配置为组合第一传输数据和第二反相串扰脉冲，并输出要发送到第一传输线的第一补偿数据; 以及第二加法单元，被配置为组合第二传输数据和第一反相串扰脉冲，并输出要发送到第二传输线的第二补偿数据。

公开(公告)号：US07817714B2

公开(公告)日：2010-10-19

申请号：US11623517

申请日：2007-01-16

申请人： Seung Jun Bae ,  Hong June Park

发明人： Seung Jun Bae ,  Hong June Park

IPC分类号： H03H7/30 ,  H03H7/40 ,  H03K5/159 ,  H03G11/04 ,  H04B3/04

CPC分类号： H04L25/03057

摘要： Provided is an integrating receiver having an adaptive decision feedback equalizer function and a system having the same. The integrating receiver can simultaneously remove an inter-symbol interference (ISI) and high frequency noises in a high speed DRAM data transmission system. The integrating receiver reduces a probability of wrong decision of data in a state in which the ISI that exists in a channel is removed so as to increase a signal-to-noise ratio (SNR) of a receiver, so that a maximum operation speed increases even in an environment with heavy noises. There is also provided a method of obtaining an equalizer coefficient suitable for the integrating receiver and a method of obtaining a reference voltage by using an integrator in a single ended transmission method. In addition, in order to increase a decision feedback equalizer speed, a look-ahead method is used. In this method, flip flops with a high speed including multiplexers are used. Accordingly, the present invention can be applied to not only a DRAM interface system but also a serial communication between chips.

摘要翻译： 提供一种具有自适应判决反馈均衡器功能的积分接收器和具有该自适应判决反馈均衡器功能的系统。 积分接收器可以同时消除高速DRAM数据传输系统中的符号间干扰（ISI）和高频噪声。 积分接收器在存在于信道中的ISI被去除的状态中降低数据错误判定的可能性，以增加接收机的信噪比（SNR），从而最大运算速度增加 即使在噪音很大的环境中也是如此。 还提供了一种获得适合于积分接收器的均衡器系数的方法以及通过使用单端传输方法中的积分器来获得参考电压的方法。 另外，为了增加判定反馈均衡器的速度，使用先行方法。 在这种方法中，使用包括多路复用器的具有高速度的触发器。 因此，本发明不仅可以应用于DRAM接口系统，还可以应用于芯片之间的串行通信。

公开(公告)号：US07161398B2

公开(公告)日：2007-01-09

申请号：US11142698

申请日：2005-06-01

申请人： Hong June Park ,  Seung Jun Bae

发明人： Hong June Park ,  Seung Jun Bae

IPC分类号： H03L7/06

CPC分类号： H03L7/07 ,  H03L7/0812 ,  H03L7/0814

摘要： Provided is a dual loop DLL for generating an internal clock signal synchronized with an external clock, which includes a reference DLL receiving a reference clock and generating a plurality of phase clock signals having a first phase difference, a coarse loop selecting one of the phase clock signals and generating first through third digital codes to allow the internal clock signal to have a phase difference smaller than a second phase difference with respect to the external clock, and a fine loop selecting two of the phase clock signals and synchronizing the internal clock signal with the external clock, in response to the first through third digital codes.

摘要翻译： 提供了一种用于产生与外部时钟同步的内部时钟信号的双循环DLL，其包括接收参考时钟并产生具有第一相位差的多个相位时钟信号的参考DLL，粗略选择相位时钟之一 信号并产生第一至第三数字代码，以允许内部时钟信号相对于外部时钟具有小于第二相位差的相位差，以及选择两个相位时钟信号并使内部时钟信号与 外部时钟，响应于第一到第三数字代码。

公开(公告)号：US20110317787A1

公开(公告)日：2011-12-29

申请号：US13166452

申请日：2011-06-22

申请人： Hae Kang Jung ,  Hong June Park

发明人： Hae Kang Jung ,  Hong June Park

IPC分类号： H04L25/49

CPC分类号： H04B3/32

摘要： A transmitter system for transmitting parallel data by compensating a crosstalk includes: first and second transmission lines parallel to each other; a first inverted crosstalk pulse generation unit configured to receive first transmission data and inverted first transmission data and output a first inverted crosstalk pulse according to a data mode; a second inverted crosstalk pulse generation unit configured to receive second transmission data transmitted in parallel to the first transmission data and inverted second transmission data and output a second inverted crosstalk pulse according to the data mode; a first addition unit configured to combine the first transmission data and the second inverted crosstalk pulse and output first compensation data to be transmitted to the first transmission line; and a second addition unit configured to combine the second transmission data and the first inverted crosstalk pulse and output second compensation data to be transmitted to the second transmission line.

摘要翻译： 用于通过补偿串扰来发送并行数据的发射机系统包括：彼此平行的第一和第二传输线; 第一反相串扰脉冲产生单元，被配置为接收第一发送数据和反向的第一发送数据，并根据数据模式输出第一反向串扰脉冲; 第二反相串扰脉冲产生单元，被配置为接收并行发送的与所述第一发送数据和反向的第二发送数据并行的第二发送数据，并根据所述数据模式输出第二反向串扰脉冲; 第一加法单元，被配置为组合第一传输数据和第二反相串扰脉冲，并输出要发送到第一传输线的第一补偿数据; 以及第二加法单元，被配置为组合第二传输数据和第一反相串扰脉冲，并输出要发送到第二传输线的第二补偿数据。

公开(公告)号：US20110090028A1

公开(公告)日：2011-04-21

申请号：US12673747

申请日：2008-03-03

申请人： Hong June Park ,  Jae Yoon Sim ,  Kyoung Ho Lee ,  Seon Kyoo Lee

发明人： Hong June Park ,  Jae Yoon Sim ,  Kyoung Ho Lee ,  Seon Kyoo Lee

IPC分类号： H01P3/08

CPC分类号： H01P3/081 ,  H01P5/185

摘要： Provided is a microstrip transmission line for reducing far-end crosstalk. In a conventional microstrip transmission line on a printed circuit board, a capacitive coupling between adjacent signal lines is smaller than an inductive coupling therebetween, so that far-end crosstalk occurs. According to the present invention, the capacitive coupling between the adjacent signal lines is increased to reduce the far-end crosstalk. A vertical-stub type microstrip transmission line is provided.

摘要翻译： 提供了一种用于减少远端串扰的微带传输线。 在印刷电路板上的常规微带传输线中，相邻信号线之间的电容耦合小于它们之间的电感耦合，从而发生远端串扰。 根据本发明，增加相邻信号线之间的电容耦合以减少远端串扰。 提供了垂直短线型微带传输线。