摘要:
A three-dimensional graphene structure, and methods of manufacturing and transferring the same including forming at least one layer of graphene having a periodically repeated three-dimensional shape. The three-dimensional graphene structure is formed by forming a pattern having a three-dimensional shape on a surface of a substrate, and forming the three-dimensional graphene structure having the three-dimensional shape of the pattern by growing graphene on the substrate on which the pattern is formed. The three-dimensional graphene structure is transferred by injecting a gas between the three-dimensional graphene structure and the substrate, separating the three-dimensional graphene structure from the substrate by bonding the three-dimensional graphene structure to an adhesive support, combining the three-dimensional graphene structure with an insulating substrate, and removing the adhesive support.
摘要:
A three-dimensional graphene structure, and methods of manufacturing and transferring the same including forming at least one layer of graphene having a periodically repeated three-dimensional shape. The three-dimensional graphene structure is formed by forming a pattern having a three-dimensional shape on a surface of a substrate, and forming the three-dimensional graphene structure having the three-dimensional shape of the pattern by growing graphene on the substrate on which the pattern is formed. The three-dimensional graphene structure is transferred by injecting a gas between the three-dimensional graphene structure and the substrate, separating the three-dimensional graphene structure from the substrate by bonding the three-dimensional graphene structure to an adhesive support, combining the three-dimensional graphene structure with an insulating substrate, and removing the adhesive support.
摘要:
A method for transmitting orthogonal frequency division multiplexing (OFDM) signals including coding the OFDM signals; forming a block of N coded data and dividing the block into L M-sized small blocks; M-point inverse fast Fourier transforming the L small blocks; combining the transformed blocks to generate an N-sized inversely-transformed block; attaching a cyclic prefix to the N-sized block; and transforming the blocks into an analog signal; and transmitting the analog signal. A method of receiving OFDM signals including digitally converting received OFDM signals and obtaining a samples from the transformed signals; detecting the starting point of an N-sized signal sample block from the samples; dividing the signal sample block into L M-sized small blocks M-point fast Fourier transforming the L small blocks; combining the transformed small blocks to generate an N-sized transform block; detecting data from the generated block, and decoding the detected data. N, M and L are integers of 1 or more and L=N/M.
摘要:
A data reproduction method and a circuit therefor for use in a digital magnetic recording/reproduction apparatus. The circuit includes a reproduction amplifier, a reproduction equalizer, a data detector, a reproduced clock recovery portion, a data/clock synchronizer, and a glitch error removal portion. The method and apparatus operates to remove a glitch error which may occur when the digital data recorded on the recording medium is recovered. The data from which the glitch error has been removed is synchronized with a reproduced clock. Removal of the glitch error prevents misoperation of the devices which perform subsequent operations, and improves the bit error ratio of the overall reproduction system.
摘要:
A non-volatile memory integrated circuit device and a method of fabricating the same are disclosed. The non-volatile memory integrated circuit device includes a semiconductor substrate, a tunneling dielectric layer, a memory gate and a select gate, a floating junction region, a bit line junction region and a common source region, and a tunneling-prevention dielectric layer pattern. The tunneling dielectric layer is formed on the semiconductor substrate. The memory gate and a select gate are formed on the tunneling dielectric layer to be spaced apart from each other. The floating junction region is formed within the semiconductor substrate between the memory gate and the select gate, the bit line junction region is formed opposite the floating junction region with respect to the memory gate, and a common source region is formed opposite the floating junction region with respect to the select gate. The tunneling-prevention dielectric layer pattern is interposed between the semiconductor substrate and the tunneling dielectric layer, and is configured to overlap part of the memory gate.