Method of forming nano-particle array by convective assembly, and convective assembly apparatus for the same
    1.
    发明授权
    Method of forming nano-particle array by convective assembly, and convective assembly apparatus for the same 有权
    通过对流组装形成纳米颗粒阵列的方法及其对流装配装置

    公开(公告)号:US08097304B2

    公开(公告)日:2012-01-17

    申请号:US11567926

    申请日:2006-12-07

    IPC分类号: B05D5/00

    摘要: A method of forming a nano-particle array by convective assembly and a convective assembly apparatus for the same are provided. The method of forming nano-particle array comprises: coating a plurality of nano-particles by forming a coating layer; performing a first convective assembly by moving a first substrate facing, in parallel to and spaced apart from a second substrate at a desired distance such that a colloidal solution including the coated nano-particles is between the first and second substrate; and performing a second convective assembly for evaporating a solvent by locally heating a surface of the colloidal solution drawn when the first substrate is moved in parallel relative to the second substrate. The present invention provides the method of forming the nano-particle array where nano-particles having a particle size from a few to several tens of nanometers are uniformly arrayed on a large area substrate at a low cost, and the convective assembly apparatus for the same.

    摘要翻译: 提供了通过对流组装形成纳米颗粒阵列的方法和用于其的对流组装装置。 形成纳米颗粒阵列的方法包括:通过形成涂层来涂覆多个纳米颗粒; 通过将第一衬底移动到与第二衬底平行并间隔开所需距离的方式执行第一对流组件,使得包含涂覆的纳米颗粒的胶体溶液位于第一和第二衬底之间; 以及执行用于蒸发溶剂的第二对流组件,其通过局部加热当所述第一衬底相对于所述第二衬底平行移动时所绘制的所述胶体溶液的表面而蒸发溶剂。 本发明提供了形成纳米粒子阵列的方法,其中纳米粒子具有几个到几十个纳米的粒子以低成本均匀地排列在大面积基底上,而对流装配装置 。

    Phase change memory devices
    4.
    发明授权
    Phase change memory devices 失效
    相变存储器件

    公开(公告)号:US07910913B2

    公开(公告)日:2011-03-22

    申请号:US12000641

    申请日:2007-12-14

    IPC分类号: H01L47/00

    摘要: A phase change memory device includes a switching device and a storage node connected to the switching device. The storage node includes a bottom stack, a phase change layer disposed on the bottom stack and a top stack disposed on the phase change layer. The phase change layer includes a unit for increasing a path of current flowing through the phase change layer and reducing a volume of a phase change memory region. The area of a surface of the unit disposed opposite to the bottom stack is greater than or equal to the area of a surface of the bottom stack in contact with the phase change layer.

    摘要翻译: 相变存储器件包括开关器件和连接到开关器件的存储节点。 存储节点包括底部堆叠,设置在底部堆叠上的相变层和设置在相变层上的顶部堆叠。 相变层包括用于增加流过相变层的电流的路径并减小相变存储区的体积的单元。 与底部叠层相对设置的单元的表面的面积大于或等于与相变层接触的底部叠层的表面的面积。

    Micro lens array and method of manufacturing the same
    8.
    发明授权
    Micro lens array and method of manufacturing the same 有权
    微透镜阵列及其制造方法

    公开(公告)号:US07580190B2

    公开(公告)日:2009-08-25

    申请号:US11448113

    申请日:2006-06-07

    IPC分类号: G02B27/10 B05D5/06

    CPC分类号: G02B3/0012 G02B3/0056

    摘要: A micro lens array and method of fabricating the micro lens array. The micro lens array includes: a substrate; a plurality of holes penetrating the substrate; and a plurality of lens units on a first surface of the substrate, each lens being at a respective one of the plurality of holes. When the micro lens array is applied to a display device, a high contrast ratio can be obtained, and the light can be transmitted in a single direction.

    摘要翻译: 微透镜阵列及其制造方法。 微透镜阵列包括:基板; 贯穿基板的多个孔; 以及在所述基板的第一表面上的多个透镜单元,每个透镜位于所述多个孔中的相应一个孔中。 当将微透镜阵列施加到显示装置时,可以获得高对比度,并且可以沿单个方向透射光。

    Power electronic device and method of manufacturing the same
    9.
    发明授权
    Power electronic device and method of manufacturing the same 有权
    电力电子装置及其制造方法

    公开(公告)号:US08835985B2

    公开(公告)日:2014-09-16

    申请号:US13208671

    申请日:2011-08-12

    摘要: According to an example embodiment, a power electronic device includes a first semiconductor layer, a second semiconductor layer on a first surface of the first semiconductor layer, and a source, a drain, and a gate on the second semiconductor layer. The source, drain and gate are separate from one another. The power electronic device further includes a 2-dimensional electron gas (2DEG) region at an interface between the first semiconductor layer and the second semiconductor layer, a first insulating layer on the gate and a second insulating layer adjacent to the first insulating layer. The first insulating layer has a first dielectric constant and the second insulating layer has a second dielectric constant less than the first dielectric constant.

    摘要翻译: 根据示例性实施例,功率电子器件包括第一半导体层,第一半导体层的第一表面上的第二半导体层以及第二半导体层上的源极,漏极和栅极。 源极,漏极和栅极彼此分开。 电力电子设备还包括在第一半导体层和第二半导体层之间的界面处的二维电子气体(2DEG)区域,栅极上的第一绝缘层和与第一绝缘层相邻的第二绝缘层。 第一绝缘层具有第一介电常数,第二绝缘层具有小于第一介电常数的第二介电常数。