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    Phase change memory devices
    2.
    发明授权
    Phase change memory devices 失效
    相变存储器件

    公开(公告)号：US07910913B2

    公开(公告)日：2011-03-22

    申请号：US12000641

    申请日：2007-12-14

    申请人： Hyuk-soon Choi ,  Ji-hyun Hur ,  Yoon-ho Kang ,  Hyo-sug Lee ,  Jai-kwang Shin ,  Jae-joon Oh

    发明人： Hyuk-soon Choi ,  Ji-hyun Hur ,  Yoon-ho Kang ,  Hyo-sug Lee ,  Jai-kwang Shin ,  Jae-joon Oh

    IPC分类号： H01L47/00

    CPC分类号： H01L45/1246 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1675 ,  Y10T29/49002

    摘要： A phase change memory device includes a switching device and a storage node connected to the switching device. The storage node includes a bottom stack, a phase change layer disposed on the bottom stack and a top stack disposed on the phase change layer. The phase change layer includes a unit for increasing a path of current flowing through the phase change layer and reducing a volume of a phase change memory region. The area of a surface of the unit disposed opposite to the bottom stack is greater than or equal to the area of a surface of the bottom stack in contact with the phase change layer.

    摘要翻译： 相变存储器件包括开关器件和连接到开关器件的存储节点。 存储节点包括底部堆叠，设置在底部堆叠上的相变层和设置在相变层上的顶部堆叠。 相变层包括用于增加流过相变层的电流的路径并减小相变存储区的体积的单元。 与底部叠层相对设置的单元的表面的面积大于或等于与相变层接触的底部叠层的表面的面积。

    Substrate structure, semiconductor device fabricated from the same, and method of fabricating the semiconductor device
    9.
    发明授权
    Substrate structure, semiconductor device fabricated from the same, and method of fabricating the semiconductor device 有权
    基板结构，由其制造的半导体器件以及半导体器件的制造方法

    公开(公告)号：US08921890B2

    公开(公告)日：2014-12-30

    申请号：US13551217

    申请日：2012-07-17

    申请人： Hyuk-soon Choi ,  Jong-seob Kim ,  Jai-kwang Shin ,  Chang-yong Um ,  Jae-joon Oh ,  Jong-bong Ha ,  In-jun Hwang ,  Ki-ha Hong

    发明人： Hyuk-soon Choi ,  Jong-seob Kim ,  Jai-kwang Shin ,  Chang-yong Um ,  Jae-joon Oh ,  Jong-bong Ha ,  In-jun Hwang ,  Ki-ha Hong

    IPC分类号： H01L31/102

    CPC分类号： H01L29/7813 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/41741 ,  H01L29/66734

    摘要： According to example embodiments, a substrate structure may include a GaN-based third material layer, a GaN-based second material layer, a GaN-based first material layer, and a buffer layer on a non-GaN-based substrate. The GaN-based first material layer may be doped with a first conductive type impurity. The GaN-based second material layer may be doped with a second conductive type impurity at a density that is less than a density of the first conductive type impurity in the first GaN-based material layer. The GaN-based third material layer may be doped with a first conductive type impurity at a density that is less than the density of the first conductive type impurity of the GaN-based first material layer. After a second substrate is attached onto the substrate structure, the non-GaN-based substrate may be removed and a GaN-based vertical type semiconductor device may be fabricated on the second substrate.

    摘要翻译： 根据示例实施例，衬底结构可以包括GaN基第三材料层，GaN基第二材料层，GaN基第一材料层和非GaN基衬底上的缓冲层。 GaN基第一材料层可以掺杂有第一导电类型的杂质。 GaN基第二材料层可以以小于第一GaN基材料层中的第一导电类型杂质的密度的密度掺杂第二导电型杂质。 GaN基第三材料层可以以比GaN基第一材料层的第一导电类型杂质的密度小的密度掺杂第一导电型杂质。 在将第二衬底附着到衬底结构上之后，可以去除非GaN基衬底，并且可以在第二衬底上制造GaN基垂直型半导体器件。

    Method Of Manufacturing High Electron Mobility Transistor
    10.
    发明申请
    Method Of Manufacturing High Electron Mobility Transistor 有权
    制造高电子迁移率晶体管的方法

    公开(公告)号：US20110212582A1

    公开(公告)日：2011-09-01

    申请号：US13017361

    申请日：2011-01-31

    申请人： Ki-ha Hong ,  U-in Chung ,  Jai-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang

    发明人： Ki-ha Hong ,  U-in Chung ,  Jai-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang

    IPC分类号： H01L21/335

    CPC分类号： H01L29/402 ,  H01L29/0891 ,  H01L29/66462 ,  H01L29/7786

    摘要： A method of manufacturing a High Electron Mobility Transistor (HEMT) may include forming first and second material layers having different lattice constants on a substrate, forming a source, a drain, and a gate on the second material layer, and changing the second material layer between the gate and the drain into a different material layer, or changing a thickness of the second material layer, or forming a p-type semiconductor layer on the second material layer. The change in the second material layer may occur in an entire region of the second material layer between the gate and the drain, or only in a partial region of the second material layer adjacent to the gate. The p-type semiconductor layer may be formed on an entire top surface of the second material layer between the gate and the drain, or only on a partial region of the top surface adjacent to the gate.

    摘要翻译： 制造高电子迁移率晶体管（HEMT）的方法可以包括在衬底上形成具有不同晶格常数的第一和第二材料层，在第二材料层上形成源极，漏极和栅极，以及改变第二材料层 在栅极和漏极之间形成不同的材料层，或改变第二材料层的厚度，或在第二材料层上形成p型半导体层。 第二材料层的变化可以在栅极和漏极之间的第二材料层的整个区域中发生，或者仅在与栅极相邻的第二材料层的部分区域中发生。 p型半导体层可以形成在栅极和漏极之间的第二材料层的整个顶表面上，或者仅形成在与栅极相邻的顶表面的部分区域上。