公开(公告)号：US20090206057A1

公开(公告)日：2009-08-20

申请号：US12031501

申请日：2008-02-14

申请人： I-Hsiung Huang ,  Chi-Lun Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

发明人： I-Hsiung Huang ,  Chi-Lun Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

IPC分类号： C23F1/08

CPC分类号： G03F1/32 ,  G03F1/36 ,  G03F1/80 ,  H01J37/32422 ,  H01L21/67167 ,  H01L21/67207 ,  H01L21/67236

摘要： A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate.

摘要翻译： 公开了一种用于制造衬底的方法和系统。 首先，提供多个处理室，多个处理室中的至少一个适于接收至少一个等离子体过滤板和多个处理室中的至少一个包含等离子体过滤板库。 从等离子体过滤板文库中选择并除去等离子体过滤板。 然后，将等离子体过滤板插入适于接收至少一个等离子体过滤板的多个处理室中的至少一个。 随后，在衬底中进行蚀刻处理。

公开(公告)号：US08609545B2

公开(公告)日：2013-12-17

申请号：US12031501

申请日：2008-02-14

申请人： I-Hsiung Huang ,  Chi-Lin Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

发明人： I-Hsiung Huang ,  Chi-Lin Lu ,  Heng-Jen Lee ,  Sheng-Chi Chin ,  Yao-Ching Ku

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： G03F1/32 ,  G03F1/36 ,  G03F1/80 ,  H01J37/32422 ,  H01L21/67167 ,  H01L21/67207 ,  H01L21/67236

摘要： A method and system for fabricating a substrate is disclosed. First, a plurality of process chambers are provided, at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate and at least one of the plurality of process chambers containing a plasma filtering plate library. A plasma filtering plate is selected and removed from the plasma filtering plate library. Then, the plasma filtering plate is inserted into at least one of the plurality of process chambers adapted to receive at least one plasma filtering plate. Subsequently, an etching process is performed in the substrate.

摘要翻译： 公开了一种用于制造衬底的方法和系统。 首先，提供多个处理室，多个处理室中的至少一个适于接收至少一个等离子体过滤板和多个处理室中的至少一个包含等离子体过滤板库。 从等离子体过滤板文库中选择并除去等离子体过滤板。 然后，将等离子体过滤板插入适于接收至少一个等离子体过滤板的多个处理室中的至少一个。 随后，在衬底中进行蚀刻处理。

公开(公告)号：US09671685B2

公开(公告)日：2017-06-06

申请号：US12976646

申请日：2010-12-22

申请人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G06F17/50 ,  G03F1/72 ,  G03F1/86

CPC分类号： G03F1/72 ,  G03F1/86

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a mask fabricated according to a design pattern; extracting a mask pattern from the mask; converting the mask pattern into a rendered mask pattern, wherein the simulated design pattern includes the design pattern and any defects in the mask; simulating a lithography process using the rendered mask pattern to create a virtual wafer pattern; and determining whether any defects in the mask are critical based on the virtual wafer pattern. The critical defects in the mask can be repaired.

公开(公告)号：US08903532B2

公开(公告)日：2014-12-02

申请号：US13429921

申请日：2012-03-26

申请人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

发明人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

IPC分类号： H01L31/18

CPC分类号： G03F7/30 ,  G03F7/16 ,  G03F7/70991 ,  H01L21/67225 ,  H01L21/67745

摘要： The present disclosure relates to a lithographic tool arrangement for semiconductor workpiece processing. The lithographic tool arrangement groups lithographic tools into clusters, and selectively transfers a semiconductor workpiece between a plurality of lithographic tools of a first type in a first cluster to a plurality of lithographic tools of a second type in a second cluster. The selective transfer is achieved though a transfer assembly, which is coupled to a defect scan tool that identifies defects generated in the lithographic tool of the first type. The disclosed lithographic tool arrangement also utilizes shared structural elements such as a housing assembly, and shared functional elements such as gases and chemicals. The lithographic tool arrangement may consist of baking, coating, exposure, and development units configured to provide a modularization of these various components in order to optimize throughput and efficiency for a given lithographic fabrication process.

摘要翻译： 本公开涉及一种用于半导体工件加工的平版印刷工具装置。 光刻工具装置将光刻工具组合成簇，并且将半导体工件在第一簇中的第一类型的多个光刻工具之间选择性地传输到第二簇中的第二类型的光刻工具。 通过转移组件实现选择性转移，转移组件耦合到识别第一类型的光刻工具中产生的缺陷的缺陷扫描工具。 所公开的平版印刷工具装置还利用共同的结构元件，例如壳体组件和诸如气体和化学品的共享功能元件。 光刻工具装置可以包括被配置成提供这些各种部件的模块化的烘烤，涂覆，曝光和显影单元，以便为给定的光刻制造工艺优化产量和效率。

公开(公告)号：US20110159410A1

公开(公告)日：2011-06-30

申请号：US12650985

申请日：2009-12-31

申请人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G03F1/00 ,  G06F17/50

CPC分类号： G03F1/24 ,  G03F1/72 ,  G03F1/84

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a blank mask and a design layout to be patterned on the blank mask, the design layout including a critical area; inspecting the blank mask for defects and generating a defect distribution map associated with the blank mask; mapping the defect distribution map to the design layout; performing a mask making process; and performing a mask defect repair process based on the mapping.

摘要翻译： 本公开提供了许多不同的实施例。 示例性方法可以包括提供空白掩模和要在空白掩模上图案化的设计布局，所述设计布局包括临界区域; 检查空白掩模的缺陷并产生与空白掩模相关联的缺陷分布图; 将缺陷分布图映射到设计布局; 进行面膜制作过程; 以及基于所述映射执行掩模缺陷修复处理。

公开(公告)号：US08592102B2

公开(公告)日：2013-11-26

申请号：US12650985

申请日：2009-12-31

申请人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： Chin-Hsiang Lin ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G03F1/24 ,  G03F1/72 ,  G03F1/84

CPC分类号： G03F1/24 ,  G03F1/72 ,  G03F1/84

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a blank mask and a design layout to be patterned on the blank mask, the design layout including a critical area; inspecting the blank mask for defects and generating a defect distribution map associated with the blank mask; mapping the defect distribution map to the design layout; performing a mask making process; and performing a mask defect repair process based on the mapping.

摘要翻译： 本公开提供了许多不同的实施例。 示例性方法可以包括提供空白掩模和要在空白掩模上图案化的设计布局，所述设计布局包括临界区域; 检查空白掩模的缺陷并产生与空白掩模相关联的缺陷分布图; 将缺陷分布图映射到设计布局; 进行面膜制作过程; 以及基于所述映射执行掩模缺陷修复处理。

公开(公告)号：US20110161893A1

公开(公告)日：2011-06-30

申请号：US12976646

申请日：2010-12-22

申请人： CHIN-HSIANG LIN ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

发明人： CHIN-HSIANG LIN ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Chiang Tu ,  Chun-Jen Chen ,  Rick Lai

IPC分类号： G06F17/50

CPC分类号： G03F1/72 ,  G03F1/86

摘要： The present disclosure provides for many different embodiments. An exemplary method can include providing a mask fabricated according to a design pattern; extracting a mask pattern from the mask; converting the mask pattern into a rendered mask pattern, wherein the simulated design pattern includes the design pattern and any defects in the mask; simulating a lithography process using the rendered mask pattern to create a virtual wafer pattern; and determining whether any defects in the mask are critical based on the virtual wafer pattern. The critical defects in the mask can be repaired.

摘要翻译： 本公开提供了许多不同的实施例。 示例性方法可以包括提供根据设计图案制造的掩模; 从掩模中提取掩模图案; 将掩模图案转换成渲染的掩模图案，其中模拟设计图案包括设计图案和掩模中的任何缺陷; 使用所渲染的掩模图案来模拟光刻工艺以产生虚拟晶片图案; 以及基于所述虚拟晶片图案确定所述掩模中的任何缺陷是否是关键的。 面罩中的关键缺陷可以修复。

公开(公告)号：US20100321660A1

公开(公告)日：2010-12-23

申请号：US12486565

申请日：2009-06-17

申请人： Jui-Chun Peng ,  Heng-Jen Lee ,  Tung-Li Wu ,  I-Hsiung Huang

发明人： Jui-Chun Peng ,  Heng-Jen Lee ,  Tung-Li Wu ,  I-Hsiung Huang

IPC分类号： G03B27/54

CPC分类号： G03B27/54 ,  G03F7/70033 ,  G03F7/70916 ,  H05G2/005 ,  H05G2/008

摘要： An apparatus includes a radiation source that emits a radiation beam that causes substantially all of a quantity of material to evaporate; and structure having first and second surface portions, a first operational mode wherein a greater quantity of a byproduct of the evaporation impinges on the first surface portion, and a second operational mode wherein a greater quantity of the byproduct impinges on the second surface portion. A different aspect involves emitting a radiation beam toward a quantity of material, the radiation beam causing substantially all of the quantity of material to evaporate; operating a structure having first and second surface portions in a first operational mode wherein a greater quantity of a byproduct of the evaporation impinges on the first surface portion; and thereafter operating the structure in a second operational mode wherein a greater quantity of the byproduct impinges on the second surface portion.

摘要翻译： 一种装置包括辐射源，辐射源发射基本上所有的一定量物质蒸发的辐射束; 以及具有第一和第二表面部分的结构，第一操作模式，其中更大量的蒸发副产物撞击在第一表面部分上，以及第二操作模式，其中较大量的副产物撞击在第二表面部分上。 不同的方面涉及朝向一定数量的材料发射辐射束，所述辐射束导致基本上所有量的材料蒸发; 在第一操作模式中操作具有第一和第二表面部分的结构，其中更大量的蒸发副产物撞击在第一表面部分上; 然后以第二操作模式操作该结构，其中较大量的副产物撞击在第二表面部分上。

公开(公告)号：US09111982B2

公开(公告)日：2015-08-18

申请号：US13539243

申请日：2012-06-29

申请人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

发明人： I-Hsiung Huang ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  Chin-Hsiang Lin

IPC分类号： H01L21/683

CPC分类号： H01L21/0201 ,  H01L21/6835 ,  H01L2221/6834 ,  H01L2221/68381

摘要： A wafer assembly includes a process wafer and a carrier wafer. Integrated circuits are formed on the process wafer. The carrier wafer is bonded to the process wafer. The carrier wafer has at least one alignment mark.

摘要翻译： 晶片组件包括处理晶片和载体晶片。 集成电路形成在处理晶片上。 载体晶片结合到工艺晶片。 载体晶片具有至少一个对准标记。

公开(公告)号：US08906599B2

公开(公告)日：2014-12-09

申请号：US13473695

申请日：2012-05-17

申请人： Yu-Mei Liu ,  Chin-Hsiang Lin ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Wei Lin

发明人： Yu-Mei Liu ,  Chin-Hsiang Lin ,  Heng-Hsin Liu ,  Heng-Jen Lee ,  I-Hsiung Huang ,  Chih-Wei Lin

IPC分类号： G03F7/20

CPC分类号： G03F7/70358

摘要： A method and system to improve scanner throughput is provided. An image from a reticle is projected onto a substrate using a continuous linear scanning procedure in which an entire column of die or cells of die is scanned continuously, i.e. without stepping to a different location. Each scan includes translating a substrate with respect to a fixed beam. While the substrate is translated, the reticle is also translated. When a first die or cell of die is projected onto the substrate, the reticle translates along a direction opposite the scan direction and as the scan continues along the same direction, the reticle then translates in the opposite direction of the substrate thereby forming an inverted pattern on the next die or cell. The time associated with exposing the substrate is minimized as the stepping operation only occurs after a complete column of cells is scanned.

摘要翻译： 提供了一种提高扫描仪吞吐量的方法和系统。 使用连续线性扫描程序将来自掩模版的图像投影到基板上，其中连续扫描整列管芯或裸片的单元，即不进入不同的位置。 每个扫描包括相对于固定光束平移衬底。 当底物被翻译时，掩模版也被翻译。 当模具的第一裸片或裸片投影到衬底上时，标线沿着与扫描方向相反的方向平移，并且随着扫描沿着相同的方向继续，标线片然后沿着衬底的相反方向平移，从而形成倒置图案 在下一个死亡或细胞。 与曝光底物相关的时间最小化，因为步进操作仅在扫描完整的单元格列之后才发生。