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55 条记录 (耗时 0.04 秒)

    Mask for electromagnetic radiation and method of fabricating the same
    1.
    发明申请
    Mask for electromagnetic radiation and method of fabricating the same 审中-公开
    电磁辐射掩模及其制造方法

    公开(公告)号：US20060134531A1

    公开(公告)日：2006-06-22

    申请号：US11274474

    申请日：2005-11-16

    申请人： I-Hun Song ,  Won-Il Ryu ,  Suk-Pil Kim ,  Hoon Kim ,  Seung-Hyuk Chang ,  Won-Joo Kim ,  Young-Soo Park

    发明人： I-Hun Song ,  Won-Il Ryu ,  Suk-Pil Kim ,  Hoon Kim ,  Seung-Hyuk Chang ,  Won-Joo Kim ,  Young-Soo Park

    IPC分类号： G03C5/00 ,  G21K5/00 ,  G03F1/00

    CPC分类号： G21K1/062 ,  B82Y10/00 ,  B82Y40/00 ,  G03F1/24

    摘要： A mask for lithography and a method of manufacturing the same. The mask may include a substrate, a reflection layer formed of a material capable of reflecting electromagnetic rays on the substrate and an absorption pattern formed in a desired pattern such that absorbing regions with respect to electromagnetic rays and windows through which electromagnetic rays pass are formed, wherein the absorption pattern includes at least one side surface that is adjacent to the window and is inclined with respect to the reflection layer. The method may include forming a reflection layer which is formed of a material capable of reflecting electromagnetic rays on a substrate, forming an absorption layer which is formed of a material capable of absorbing electromagnetic rays on the refection layer, and patterning the absorption layer to form an absorption pattern with at least one side surface adjacent to a window that has an inclined side surface with respect to the reflection layer.

    摘要翻译： 光刻用掩模及其制造方法。 掩模可以包括基板，由能够在基板上反射电磁射线的材料形成的反射层和形成为期望图案的吸收图案，使得形成相对于电磁射线通过的电磁射线和窗口的吸收区域， 其中所述吸收图案包括与所述窗口相邻并且相对于所述反射层倾斜的至少一个侧表面。 该方法可以包括形成由能够在基板上反射电磁射线的材料形成的反射层，形成由能够在反射层上吸收电磁射线的材料形成的吸收层，以及图案化吸收层以形成 具有与窗口相邻的至少一个侧表面的吸收图案，该窗口具有相对于反射层的倾斜侧表面。

    Non-volatile memory devices and methods of operating and fabricating the same
    7.
    发明申请
    Non-volatile memory devices and methods of operating and fabricating the same 审中-公开
    非易失性存储器件及其操作和制造方法

    公开(公告)号：US20080191264A1

    公开(公告)日：2008-08-14

    申请号：US12010139

    申请日：2008-01-22

    申请人： Won-Joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Tae-hee Lee

    发明人： Won-Joo Kim ,  Yoon-dong Park ,  June-mo Koo ,  Suk-pil Kim ,  Tae-hee Lee

    IPC分类号： H01L29/00 ,  H01L21/3205

    CPC分类号： H01L27/115 ,  H01L27/11521

    摘要： Non-volatile memory devices highly integrated using an oxide based compound semiconductor and methods of operating and fabricating the same are provided. A non-volatile memory device may include one or more oxide based compound semiconductor layers. A plurality of auxiliary gate electrodes may be arranged to be insulated from the one or more oxide based compound semiconductor layers. A plurality of control gate electrodes may be positioned between adjacent pairs of the plurality of auxiliary gate electrodes at a different level from the plurality of auxiliary gate electrodes. The plurality of control gate electrodes may be insulated from the one or more oxide based compound semiconductor layers. A plurality of charge storing layers may be interposed between the one or more oxide based compound semiconductor layers and the plurality of control gate electrodes.

    摘要翻译： 提供了使用基于氧化物的化合物半导体高度集成的非易失性存储器件及其操作和制造方法。 非易失性存储器件可以包括一个或多个基于氧化物的化合物半导体层。 多个辅助栅极电极可以布置成与一个或多个氧化物基化合物半导体层绝缘。 多个控制栅电极可以位于与多个辅助栅极电极不同的多个辅助栅电极的相邻对之间。 多个控制栅电极可以与一个或多个氧化物基化合物半导体层绝缘。 可以在一个或多个氧化物基化合物半导体层和多个控制栅电极之间插入多个电荷存储层。

    Wire-type semiconductor devices and methods of fabricating the same
    8.
    发明授权
    Wire-type semiconductor devices and methods of fabricating the same 有权
    线型半导体器件及其制造方法

    公开(公告)号：US07663166B2

    公开(公告)日：2010-02-16

    申请号：US11723074

    申请日：2007-03-16

    申请人： Suk-Pil Kim ,  Yoon-Dong Park ,  Won-Joo Kim

    发明人： Suk-Pil Kim ,  Yoon-Dong Park ,  Won-Joo Kim

    IPC分类号： H01L27/088

    CPC分类号： H01L29/0657 ,  H01L29/42392 ,  H01L29/78696

    摘要： Provided are relatively higher-performance wire-type semiconductor devices and relatively economical methods of fabricating the same. A wire-type semiconductor device may include at least one pair of support pillars protruding above a semiconductor substrate, at least one fin protruding above the semiconductor substrate and having ends connected to the at least one pair of support pillars, at least one semiconductor wire having ends connected to the at least one pair of support pillars and being separated from the at least one fin, a common gate electrode surrounding the surface of the at least one semiconductor wire, and a gate insulating layer between the at least one semiconductor wire and the common gate electrode.

    摘要翻译： 提供了相对较高性能的线型半导体器件和相对经济的制造方法。 线型半导体器件可以包括突出在半导体衬底上方的至少一对支撑柱，至少一个突出于半导体衬底之上并具有连接到至少一对支撑柱的端子的鳍片，至少一个半导体线材具有 连接到所述至少一对支撑柱并且与所述至少一个鳍分离的端部，围绕所述至少一个半导体线的表面的公共栅电极以及所述至少一个半导体线和所述至少一个半导体线之间的栅极绝缘层 共栅电极。

    NAND-type nonvolatile memory devices having common bit lines and methods of operating the same
    10.
    发明申请
    NAND-type nonvolatile memory devices having common bit lines and methods of operating the same 审中-公开
    具有公共位线的NAND型非易失性存储器件及其操作方法

    公开(公告)号：US20070183204A1

    公开(公告)日：2007-08-09

    申请号：US11657652

    申请日：2007-01-25

    申请人： Suk-Pil Kim ,  Won-Joo Kim ,  Yoon-Dong Park ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    发明人： Suk-Pil Kim ,  Won-Joo Kim ,  Yoon-Dong Park ,  Jae-Woong Hyun ,  Jung-Hoon Lee

    IPC分类号： G11C11/34 ,  G11C16/04

    CPC分类号： G11C16/0483 ,  G11C7/18

    摘要： A NAND-type nonvolatile memory device includes a first string and a second string. The ends of each of the first and second strings are connected to a common bit line and a common source line, respectively. Each of the first string and the second string have a string selection transistors, a plurality of unit devices and a source selection transistor. Word lines are respectively connected to control gates of the unit devices in the same rows. A first string selection line and a second string selection line are respectively connected to the gates of the string selection transistors of the first string and the second string. A first source selection line and a second source selection line are respectively connected to the gates of the first string and the second string.

    摘要翻译： NAND型非易失性存储器件包括第一串和第二串。 第一和第二串中的每一个的端部分别连接到公共位线和公共源极线。 第一串和第二串中的每一个具有串选择晶体管，多个单元器件和源极选择晶体管。 字线分别连接到相同行中的单元设备的控制栅极。 第一串选择线和第二串选择线分别连接到第一串和第二串的串选择晶体管的栅极。 第一源选择线和第二源选择线分别连接到第一串和第二串的栅极。