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1.
公开(公告)号:US3445734A
公开(公告)日:1969-05-20
申请号:US3445734D
申请日:1965-12-22
Applicant: IBM
Inventor: PECORARO RAYMOND P , BILOUS OREST
IPC: H01L21/74 , H01L27/00 , H01L29/00 , H01L29/735 , H01L11/00
CPC classification number: H01L29/735 , H01L21/74 , H01L27/00 , H01L29/00 , Y10S148/037 , Y10S148/049 , Y10S148/053 , Y10S148/106 , Y10S148/145
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2.Semiconductor device having compensated barrier zones between n-p junctions 失效
Title translation: 具有N-P结之间的补偿障碍区的半导体器件公开(公告)号:US3473093A
公开(公告)日:1969-10-14
申请号:US3473093D
申请日:1965-08-18
Applicant: IBM
Inventor: BILOUS OREST , MEULEMANS DARRELL R , PECORARO RAYMOND P , SELBY MICHAEL C
IPC: H01L29/73 , H01L21/00 , H01L21/331 , H01L23/485 , H01L27/00 , H01L29/00 , H01L29/861 , H01L3/00 , H01L5/00
CPC classification number: H01L27/00 , H01L21/00 , H01L23/485 , H01L29/00 , H01L2924/0002 , H01L2924/3011 , Y10S148/035 , Y10S148/062 , Y10S148/085 , Y10S438/904 , Y10S438/919 , H01L2924/00
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3.A process for fabricating semiconductor devices having compensated barrier zones between np-junctions 失效
Title translation: 用于制备具有NP结之间的补偿障碍区的半导体器件的工艺公开(公告)号:US3617398A
公开(公告)日:1971-11-02
申请号:US3617398D
申请日:1968-10-22
Applicant: IBM
Inventor: BILOUS OREST , MEULEMANS DARRELL R , PECORADO RAYMOND P , SELBY MICHAEL C
CPC classification number: H01L27/0821 , H01L21/00 , H01L27/0652 , Y10S148/049 , Y10S148/062 , Y10S148/085 , Y10S438/919
Abstract: A process for forming semiconductor devices by forming in a semiconductor substrate of one conductivity type a diffused region of a second conductivity type circumscribed by an adjacent gold compensated intrinsic region.
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4.
公开(公告)号:US3421057A
公开(公告)日:1969-01-07
申请号:US3421057D
申请日:1965-08-23
Applicant: IBM
Inventor: BILOUS OREST , CASTRUCCI PAUL P , CLARK TOMMY D
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