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Patent Agency Ranking
1.发明申请PRECURSOR SUBSTRATE, FLEXIBLE CIRCUIT BOARD AND PROCESS FOR PRODUCING THE SAME 审中-公开前置基板，柔性电路板及其制造方法公开(公告)号：US20140224528A1
公开(公告)日：2014-08-14
申请号：US13852002
申请日：2013-03-28
Applicant: ICHIA TECHNOLOGIES,INC.
Inventor： CHIEN-HWA CHIU , CHIH-MIN CHAO , PEIR-RONG KUO , CHIA-HUA CHIANG , CHIH-CHENG HSIAO , FENG-PING KUAN , YING-WEI LEE , YUNG-CHANG JUANG
CPC classification number: H05K1/028 , H05K1/0393 , H05K3/20 , H05K3/22 , H05K3/386 , H05K3/426 , H05K3/465 , H05K3/4673 , H05K2201/0154 , Y10T428/24521 , Y10T428/265 , Y10T428/31678
Abstract: The present invention provides a flexible circuit board, comprising at least a multilayer unit disposed on a substrate, wherein the multilayer unit includes: an adhesion enhancing layer formed within the surface of the substrate, a first electrical conducting unit disposed on the adhesion enhancing layer, and a second electrical conducting layer formed on the first electrical conducting layer, wherein the adhesion enhancing layer is Palladium, the first electrical conducting layer is Nickel, and the substrate is composed of polyimide(PI).
Abstract translation: 本发明提供了一种柔性电路板，其至少包括设置在基板上的多层单元，其中所述多层单元包括：形成在所述基板的表面内的粘附增强层，设置在所述粘合增强层上的第一导电单元， 以及形成在所述第一导电层上的第二导电层，其中所述粘附增强层为钯，所述第一导电层为镍，所述基板由聚酰亚胺（PI）构成。
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公开(公告)号：US20160255721A1
公开(公告)日：2016-09-01
申请号：US15149768
申请日：2016-05-09
Applicant: ICHIA TECHNOLOGIES,INC.
Inventor： CHIEN-HWA CHIU , CHIH-MIN CHAO , PEIR-RONG KUO , CHIA-HUA CHIANG , CHIH-CHENG HSIAO , FENG-PING KUAN , YING-WEI LEE , WEI-CHENG LEE
CPC classification number: H05K1/115 , C23C18/16 , C23C28/021 , C23C28/023 , C23C28/32 , H05K1/0326 , H05K1/0346 , H05K1/09 , H05K1/111 , H05K1/118 , H05K3/06 , H05K3/181 , H05K3/188 , H05K3/381 , H05K3/426 , H05K3/46 , H05K2201/0154 , H05K2201/0338 , H05K2201/05 , Y10T29/49124 , Y10T29/49155
Abstract: A printed circuit board precursor includes a substrate, a catalytic layer, a conductive layer, and a metal layer. The substrate has a top surface, a bottom surface, and a wall defining a channel, and the channel completely penetrates through the substrate from the top surface to the bottom surface. The catalytic layer is formed on the top surface, the bottom surface, and the wall of the substrate. The conductive layer is attached to and covers the catalytic layer. The metal layer is disposed on the conductive layers and filled in the channel.
Abstract translation: 印刷电路板前体包括基板，催化层，导电层和金属层。 衬底具有顶表面，底表面和限定通道的壁，并且通道从顶表面到底表面完全穿透衬底。 催化层形成在基板的顶表面，底表面和壁上。 导电层附着并覆盖催化层。 金属层设置在导电层上并填充在通道中。
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公开(公告)号：US20140224527A1
公开(公告)日：2014-08-14
申请号：US13967401
申请日：2013-08-15
Applicant: ICHIA TECHNOLOGIES,INC.
Inventor： CHIEN-HWA CHIU , CHIH-MIN CHAO , PEIR-RONG KUO , CHIA-HUA CHIANG , CHIH-CHENG HSIAO , FENG-PING KUAN , YING-WEI LEE , YUNG-CHANG JUANG
CPC classification number: H05K1/028 , H05K1/0393 , H05K3/20 , H05K3/22 , H05K3/386 , H05K3/426 , H05K3/465 , H05K3/4673 , H05K2201/0154 , Y10T428/24521 , Y10T428/265 , Y10T428/31678
Abstract: A flexible circuit board comprises a substrate which has a polyimide layer recessed to define at least a compartment. The compartment includes an inner wall surface having a side wall and a bottom wall. The compartment is for containing a multilayer unit, wherein the multilayer unit includes an adhesion enhancing layer formed on the wall of the compartment, a first electrically conducting layer disposed on the adhesion enhancing layer, and a second electrically conducting layer formed on the first electrically conducting layer. The adhesion enhancing layer is palladium. The first electrically conducting layer is nickel. The substrate is composed of polyimide (PI).
Abstract translation: 柔性电路板包括具有凹陷以限定至少隔室的聚酰亚胺层的基板。 隔室包括具有侧壁和底壁的内壁表面。 隔室用于容纳多层单元，其中多层单元包括形成在隔室壁上的粘附增强层，设置在粘附增强层上的第一导电层和形成在第一导电层上的第二导电层 层。 粘附增强层是钯。 第一导电层是镍。 基板由聚酰亚胺（PI）组成。
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4.发明申请公开(公告)号：US20150021069A1
公开(公告)日：2015-01-22
申请号：US14058504
申请日：2013-10-21
Applicant: ICHIA TECHNOLOGIES,INC.
Inventor： CHIEN-HWA CHIU , Chih-Min Chao , Peir-Rong Kuo , Chia-Hua Chiang , Chih-Cheng Hsiao , Feng-Ping Kuan , Ying-Wei Lee , Wei-Cheng Lee
CPC classification number: H05K1/115 , C23C18/16 , C23C28/021 , C23C28/023 , C23C28/32 , H05K1/0326 , H05K1/0346 , H05K1/09 , H05K1/111 , H05K1/118 , H05K3/06 , H05K3/181 , H05K3/188 , H05K3/381 , H05K3/426 , H05K3/46 , H05K2201/0154 , H05K2201/0338 , H05K2201/05 , Y10T29/49124 , Y10T29/49155
Abstract: A method of manufacturing a printed circuit board precursor includes the steps of providing a substrate. Then the surface of the substrate is catalyzed to form a catalytic layer by a catalyst. Subsequently, a conductive layer is formed and attached to the surface of the catalytic layer. Finally, a metal layer is electroplated on the conductive layer. A printed circuit board precursor includes a substrate having a surface. Specifically, the surface is catalytically treated to form a catalytic layer. The precursor also includes a conductive layer which is attached to and covers the catalytic layer and a metal layer which is disposed on the conductive layer.
Abstract translation: 制造印刷电路板前体的方法包括提供基板的步骤。 然后催化底物的表面形成催化剂层。 随后，形成导电层并附着到催化层的表面。 最后，将金属层电镀在导电层上。 印刷电路板前体包括具有表面的基板。 具体地，表面被催化处理以形成催化层。 前体还包括附着到覆盖催化剂层的导电层和设置在导电层上的金属层。
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公开(公告)号：US20140224526A1
公开(公告)日：2014-08-14
申请号：US13852014
申请日：2013-03-28
Applicant: ICHIA TECHNOLOGIES, INC.
Inventor： CHIEN-HWA CHIU , CHIH-MIN CHAO , PEIR-RONG KUO , CHIA-HUA CHIANG , CHIH-CHENG HSIAO , FENG-PING KUAN , YING-WEI LEE , YUNG-CHANG JUANG
CPC classification number: H05K3/4673 , H05K1/0393 , H05K3/108 , H05K3/426
Abstract: The present invention provides a multi-layer flexible circuit board, comprising at least an electric circuit disposed on a vertical interval layer, wherein at least two sides of the electric circuit are covered by neighboring interval layer and another vertical interval composed layer of electric insulating material. The disclosure provides a non-pressing way to stack the multi-layer flexible circuit board, preventing fault crevice derived from a prior-known pressing way.
Abstract translation: 本发明提供一种多层柔性电路板，其至少包括设置在垂直间隔层上的电路，其中电路的至少两侧被相邻的间隔层覆盖，另一个垂直间隔构成的电绝缘材料层 。 本公开提供了一种非压制方式来堆叠多层柔性电路板，防止从先前已知的按压方式导出的故障缝隙。
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