Abstract:
The disclosed technology generally relates a semiconductor device comprising transistors, and more particularly to a semiconductor device comprising transistors each having a gate stack with a different effective work function, and methods of fabricating such a device. In one aspect, the method of fabricating the semiconductor comprises providing at least two channel regions in the substrate and providing a dielectric layer on the substrate. The method additionally includes forming a plurality of gate regions by providing openings in the dielectric layer. The method further includes providing a gate dielectric layer in the openings and providing on the gate dielectric layer of each of the gate regions a barrier layer stack having different thickness along the different gate regions.
Abstract:
The disclosed technology generally relates to semiconductor devices and methods of forming the same. In one aspect, a method of forming a semiconductor device having a first field-effect transistor (FET) device and a second FET device comprises forming the first and second FET devices from a first stack and a second stack comprising a channel material arranged on a sacrificial material. The method can include forming first spacers at sidewalls of the first and second stacks, and forming a second spacer between the first spacers. After recessing of the sacrificial material and removal of the first spacers, gate structures may be formed, wrapping around the at least partly released channel portions. The gate structure of the first transistor device can be separated from the gate structure of the second transistor device by the second spacer.
Abstract:
The disclosed technology generally relates a semiconductor device comprising transistors, and more particularly to a semiconductor device comprising transistors each having a gate stack with a different effective work function, and methods of fabricating such a device. In one aspect, the method of fabricating the semiconductor comprises providing at least two channel regions in the substrate and providing a dielectric layer on the substrate. The method additionally includes forming a plurality of gate regions by providing openings in the dielectric layer. The method further includes providing a gate dielectric layer in the openings and providing on the gate dielectric layer of each of the gate regions a barrier layer stack having different thickness along the different gate regions.
Abstract:
The disclosed technology generally relates to semiconductor devices and methods of forming the same. In one aspect, a method of forming a semiconductor device having a first field-effect transistor (FET) device and a second FET device comprises forming the first and second FET devices from a first stack and a second stack comprising a channel material arranged on a sacrificial material. The method can include forming first spacers at sidewalls of the first and second stacks, and forming a second spacer between the first spacers. After recessing of the sacrificial material and removal of the first spacers, gate structures may be formed, wrapping around the at least partly released channel portions. The gate structure of the first transistor device can be separated from the gate structure of the second transistor device by the second spacer.
Abstract:
The disclosed technology generally relates to semiconductor devices and more particularly to a gate structure for a semiconductor device, and to methods of forming the same. In an aspect a method for forming a gate structure includes forming a first set of one or more semiconductor features and a second set of one or more semiconductor features. The method additionally includes forming a sacrificial gate extending across the semiconductor features of the first set and the semiconductor features of the second set. The method additionally includes forming a hole by etching the sacrificial gate, wherein the sacrificial gate is divided into a first sacrificial gate section and a second sacrificial gate section, forming a barrier in the hole by depositing a barrier material in the hole, removing the first sacrificial gate section and the second sacrificial gate section by etching wherein a first trench section is formed and a second trench section is formed, forming a first gate conductor in the first trench section and the second trench section, forming a mask above the second trench section, the mask exposing the first trench section, etching the first gate conductor in the first trench section, wherein the mask and the barrier counteracts etching of the first gate conductor in the second trench section, and forming a second gate conductor in the first trench section.
Abstract:
The disclosed technology generally relates to integrated circuit devices and methods of forming the same, and more particularly to metal electrodes whose effective work function can be tuned. In one aspect, a method of forming a metal electrode of a semiconductor structure includes providing a semiconductor substrate having at least a region covered with a dielectric. The semiconductor substrate is introduced into a chamber configured for atomic layer deposition (ALD). A metal for the metal electrode is deposited at least on the dielectric by performing an ALD cycle. Performing the ALD cycle includes pulsing a Ti-containing precursor gas followed by pulsing a Ta-containing precursor gas, and further includes pulsing NH3 gas.
Abstract:
The disclosed technology generally relates to semiconductor devices and more particularly to a gate structure for a semiconductor device, and to methods of forming the same. In an aspect a method for forming a gate structure includes forming a first set of one or more semiconductor features and a second set of one or more semiconductor features. The method additionally includes forming a sacrificial gate extending across the semiconductor features of the first set and the semiconductor features of the second set. The method additionally includes forming a hole by etching the sacrificial gate, wherein the sacrificial gate is divided into a first sacrificial gate section and a second sacrificial gate section, forming a barrier in the hole by depositing a barrier material in the hole, removing the first sacrificial gate section and the second sacrificial gate section by etching wherein a first trench section is formed and a second trench section is formed, forming a first gate conductor in the first trench section and the second trench section, forming a mask above the second trench section, the mask exposing the first trench section, etching the first gate conductor in the first trench section, wherein the mask and the barrier counteracts etching of the first gate conductor in the second trench section, and forming a second gate conductor in the first trench section.