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公开(公告)号:US20240113053A1
公开(公告)日:2024-04-04
申请号:US18466929
申请日:2023-09-14
Applicant: Infineon Technologies AG
Inventor: Andreas Korzenietz , Anton Mauder , Christoffer Erbert , Julia Zischang
IPC: H01L23/00
CPC classification number: H01L24/05 , H01L24/03 , H01L2224/05078 , H01L2924/13055
Abstract: The application relates to a power semiconductor device, including: a semiconductor body having a front side coupled to a frontside metallization and a backside coupled to a backside metallization; and an active region with a plurality of transistor cells. The frontside metallization includes a first load terminal structure and a control terminal structure. At least one of the first layer and the second layer is laterally segmented, with a first segment being part of the first load terminal structure and a second segment being part of the control terminal structure.
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公开(公告)号:US11848377B2
公开(公告)日:2023-12-19
申请号:US17307632
申请日:2021-05-04
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Hans-Joachim Schulze , Matteo Dainese , Elmar Falck , Franz-Josef Niedernostheide , Manfred Pfaffenlehner
CPC classification number: H01L29/7811 , H01L29/0619 , H01L29/1095 , H01L29/402
Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.
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公开(公告)号:US20230282736A1
公开(公告)日:2023-09-07
申请号:US17686506
申请日:2022-03-04
Applicant: Infineon Technologies AG
Inventor: Rabie Djemour , Hannes Mathias Geike , Anton Mauder
IPC: H01L29/739 , H01L29/06 , H01L29/40
CPC classification number: H01L29/7397 , H01L29/0615 , H01L29/407
Abstract: A semiconductor die includes: a semiconductor substrate; transistor cells formed in a first region of the semiconductor substrate and electrically coupled in parallel to form a power transistor, the transistor cells including first trenches that extend from a first surface of the semiconductor substrate into the first region; a gate pad formed above the first surface and electrically connected to gate electrodes in the first trenches, the gate pad being formed over a second region of the semiconductor substrate that is devoid of functional transistor cells; second trenches extending from the first surface into the second region and including gate electrodes that are electrically connected to the gate pad and form a first conductor of an additional input capacitance of the power transistor; and a second conductor of the additional input capacitance formed in the second region adjacent the second trenches. Methods of producing the semiconductor die are also described.
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公开(公告)号:US20220359314A1
公开(公告)日:2022-11-10
申请号:US17737492
申请日:2022-05-05
Applicant: Infineon Technologies AG
Inventor: Rabie Djemour , Anton Mauder
Abstract: A semiconductor device includes a semiconductor portion with a first surface at a front side, wherein the semiconductor portion includes an active area, a termination structure laterally surrounding the active area, and a field-free region between the termination structure and a lateral outer surface of the semiconductor portion. The field-free region includes a probe contact region and a main portion. The probe contact region and the main portion form a semiconductor junction. A probe pad on the first surface and the probe contact region form an ohmic contact. A protection passivation layer on the first surface is formed on at least the termination structure and exposes the probe pad.
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公开(公告)号:US20220059650A1
公开(公告)日:2022-02-24
申请号:US17519737
申请日:2021-11-05
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Franz-Josef Niedernostheide , Christian Philipp Sandow
IPC: H01L29/06 , H01L29/78 , H01L29/739
Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, an active cell field in the body, and a plurality of first and second cells in the active cell field. Each cell is electrically connected to the first load terminal structure and to a drift region. Each first cell includes a mesa having a port region electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each second cell includes a mesa having a port region of the opposite conductivity type electrically connected to the first load terminal structure, and a channel region coupled to the drift region. Each mesa is spatially confined in a direction perpendicular to a direction of the load current within the respective mesa, by an insulation structure and has a total extension of less than 100 nm in the direction.
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公开(公告)号:US11177354B2
公开(公告)日:2021-11-16
申请号:US16745015
申请日:2020-01-16
Applicant: Infineon Technologies AG
Inventor: Andreas Meiser , Caspar Leendertz , Anton Mauder , Roland Rupp
IPC: H01L29/16 , H01L29/06 , H01L29/417 , H01L29/40 , H01L29/423 , H01L29/78 , H01L29/66 , H01L21/02 , H01L29/04 , H01L29/739
Abstract: A method of manufacturing a silicon carbide device includes: forming a trench in a process surface of a silicon carbide substrate that has a body layer forming second pn junctions with a drift layer structure, wherein the body layer is between the process surface and the drift layer structure and wherein the trench exposes the drift layer structure; implanting dopants through a bottom of the trench to form a shielding region that forms a first pn junction with the drift layer structure; forming dielectric spacers on sidewalls of the trench; and forming a buried portion of an auxiliary electrode in a bottom section of the trench, the buried portion adjoining the shielding region.
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公开(公告)号:US11018249B2
公开(公告)日:2021-05-25
申请号:US16263244
申请日:2019-01-31
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Hans-Joachim Schulze , Matteo Dainese , Elmar Falck , Franz-Josef Niedernostheide , Manfred Pfaffenlehner
Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.
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公开(公告)号:US10985248B2
公开(公告)日:2021-04-20
申请号:US16354973
申请日:2019-03-15
Applicant: Infineon Technologies AG
Inventor: Caspar Leendertz , Romain Esteve , Anton Mauder , Andreas Meiser , Bernd Zippelius
Abstract: Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.
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公开(公告)号:US10679857B2
公开(公告)日:2020-06-09
申请号:US16441534
申请日:2019-06-14
Applicant: Infineon Technologies AG
Inventor: Johannes Georg Laven , Anton Mauder , Hans-Joachim Schulze , Werner Schustereder
IPC: H01L29/423 , H01L21/28 , H01L29/40 , H01L29/66 , H01L29/739 , H01L21/311 , H01L21/3213 , H01L29/78 , H01L37/00 , H01L29/04 , H01L21/265
Abstract: A semiconductor device and method is disclosed. In one example, the method for forming a semiconductor device includes forming a trench extending from a front side surface of a semiconductor substrate into the semiconductor substrate. The method includes forming of material to be structured inside the trench. Material to be structured is irradiated with a tilted reactive ion beam at a non-orthogonal angle with respect to the front side surface such that an undesired portion of the material to be structured is removed due to the irradiation with the tilted reactive ion beam while an irradiation of another portion of the material to be structured is masked by an edge of the trench.
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公开(公告)号:US10586851B2
公开(公告)日:2020-03-10
申请号:US15934518
申请日:2018-03-23
Applicant: Infineon Technologies AG
Inventor: Andreas Meiser , Caspar Leendertz , Anton Mauder , Roland Rupp
IPC: H01L29/16 , H01L29/66 , H01L29/78 , H01L29/06 , H01L29/739 , H01L29/04 , H01L29/417 , H01L29/40 , H01L21/02
Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body. The trench structure includes an auxiliary electrode at a bottom of the trench structure and a gate electrode arranged between the auxiliary electrode and the first surface. A shielding region adjoins the auxiliary electrode at the bottom of the trench structure and forms a first pn junction with a drift structure. A corresponding method of manufacturing the semiconductor device is also described.
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