公开(公告)号：US20210068292A1

公开(公告)日：2021-03-04

申请号：US16967091

申请日：2018-07-20

Applicant: INTEL CORPORATION

Inventor： Xiaoguo Liang ,  Haifeng Gong ,  Wenhui Shu ,  Chuan Song ,  Xiang Zhou

IPC: H05K7/14 ,  H05K7/20 ,  G06F1/3206

Abstract: In some examples, a control unit is configured to control a computer server rack having a first grid power source, a second grid power source, and a battery backup system. The control unit is adapted to monitor a failed status of one or more power supply units in the computer server rack, to determine location information relating to the one or more power supply units having the failed status, to determine input power of the one or more power supply units having the failed status, to adjust an input power of the first grid power source based on the determined input power, and to adjust an input power of the second grid power source based on the determined input power.

公开(公告)号：US20240130068A1

公开(公告)日：2024-04-18

申请号：US18399565

申请日：2023-12-28

Applicant: Intel Corporation

Inventor： Nan Wang ,  Zhichao Z. Zhang ,  Lihui Wu ,  Jialiang Xu ,  Xiaoguo Liang ,  Bo Chen ,  Haifeng Gong

IPC: H05K7/14 ,  H01R12/79 ,  H05K1/02

CPC classification number: H05K7/1492 ,  H01R12/79 ,  H05K1/0213 ,  H05K7/1402 ,  H05K2201/0154 ,  H05K2201/10386

Abstract: Technologies for a flexible three-dimensional power plane in a chassis are disclosed. In one embodiment, a flexible ribbon cable is laid along a circuit board tray. The flexible ribbon cable is secured to the tray using power bosses. The power bosses connect to one or more conductors on the ribbon cable. When the circuit board is mounted on the circuit board tray, the power bosses extend through holes in the circuit board and mate with power clips on the surface of the circuit board tray. The ribbon cable, power bosses, and power clips can distribute power to various locations on the circuit board, without requiring large traces that take up space on the circuit board.

公开(公告)号：US11874724B2

公开(公告)日：2024-01-16

申请号：US17255317

申请日：2018-09-28

Applicant: Intel Corporation

Inventor： Haifeng Gong ,  Manisha M. Nilange ,  Shiwei Xu ,  Xiaoxia Fu

IPC: G06F11/00 ,  G06F11/07 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F11/0757 ,  G06F11/0706 ,  G06F11/0787 ,  G06F11/0793 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2213/0026

Abstract: An extension device is positioned within a point-to-point link to connect two devices, where the extension device includes error detection circuitry to detect a set of errors at the extension device. The extension device further includes memory to store an event register, where the extension device is to write data to the event register to describe detection of an error by the error detection circuitry. The extension device further includes a transmitter to transmit a notification signal to indicate the detection of the error and presence of data in the evert register associated with the error.

公开(公告)号：US20220263913A1

公开(公告)日：2022-08-18

申请号：US17733625

申请日：2022-04-29

Applicant: Intel Corporation

Inventor： Kefei Zhang ,  Zhihao Xie ,  Haifeng Gong ,  Fusheng Zhao

IPC: H04L67/2866 ,  G06F3/06

Abstract: A data center cluster includes a plurality of host systems coupled to a network processing device by a Compute Express Link (CXL) switch, where the network processing device includes memory to implement a memory pool for the data center cluster. Request and responses are communicated within the data center cluster using the memory pool and the network processing device manages communication within the data center cluster.

公开(公告)号：US11341248B2

公开(公告)日：2022-05-24

申请号：US16229496

申请日：2018-12-21

Applicant: Intel Corporation

Inventor： Haifeng Gong ,  Vasudevan Srinivasan ,  Antonio J. Hasbun Marin

IPC: G06F21/57 ,  G06F21/60 ,  H04L9/32

Abstract: A system includes a processor coupled to an integrated circuit. The processor includes a non-volatile memory to store instructions to perform a boot process. The boot process is discontinued to prevent unauthorized use of the processor if a value received from the integrated circuit in response to a first value sent to the integrated is not valid.

公开(公告)号：US20210271537A1

公开(公告)日：2021-09-02

申请号：US17255317

申请日：2018-09-28

Applicant: Intel Corporation

Inventor： Haifeng Gong ,  Manisha M. Nilange ,  Shiwei Xu ,  Xiaoxia Fu

IPC: G06F11/07 ,  G06F13/40 ,  G06F13/42

Abstract: An extension device is positioned within a point-to-point link to connect two devices, where the extension device includes error detection circuitry to detect a set of errors at the extension device. The extension device further includes memory to store an event register, where the extension device is to write data to the event register to describe detection of an error by the error detection circuitry. The extension device further includes a transmitter to transmit a notification signal to indicate the detection of the error and presence of data in the evert register associated with the error.

公开(公告)号：US20240152417A1

公开(公告)日：2024-05-09

申请号：US18357603

申请日：2023-07-24

Applicant: Intel Corporation

Inventor： Haifeng Gong ,  Manisha M. Nilange ,  Shiwei Xu ,  Xiaoxia Fu

IPC: G06F11/07 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F11/0757 ,  G06F11/0706 ,  G06F11/0787 ,  G06F11/0793 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2213/0026

Abstract: An extension device is positioned within a point-to-point link to connect two devices, where the extension device includes error detection circuitry to detect a set of errors at the extension device. The extension device further includes memory to store an event register, where the extension device is to write data to the event register to describe detection of an error by the error detection circuitry. The extension device further includes a transmitter to transmit a notification signal to indicate the detection of the error and presence of the data in the event register associated with the error.

公开(公告)号：US11320884B2

公开(公告)日：2022-05-03

申请号：US16967091

申请日：2018-07-20

Applicant: INTEL CORPORATION

Inventor： Xiaoguo Liang ,  Haifeng Gong ,  Wenhui Shu ,  Chuan Song ,  Xiang Zhou

IPC: G06F1/30 ,  G06F1/3206 ,  H04J3/16

Abstract: In some examples, a control unit is configured to control a computer server rack having a first grid power source, a second grid power source, and a battery backup system. The control unit is adapted to monitor a failed status of one or more power supply units in the computer server rack, to determine location information relating to the one or more power supply units having the failed status, to determine input power of the one or more power supply units having the failed status, to adjust an input power of the first grid power source based on the determined input power, and to adjust an input power of the second grid power source based on the determined input power.

公开(公告)号：US20220091645A1

公开(公告)日：2022-03-24

申请号：US17543398

申请日：2021-12-06

Applicant: Intel Corporation

Inventor： Yanbing Sun ,  Xiaoguo Liang ,  Haifeng Gong ,  Ming Zhang

IPC: G06F1/20 ,  G06F3/06 ,  G11C7/04

Abstract: Provided are devices and methods relating to temperature control in a solid state drive (SSD). One embodiment include a SSD including a housing including a plurality of sides surrounding an interior region. The SSD includes at least one vent on the housing, the at least one vent configured to be opened and closed in response to a signal. The SSD also includes a temperature sensor and a controller, the controller configured to send a signal to open the at least one vent when a temperature sensed inside the interior region reaches a first temperature, and the controller configured to close the at least one vent when a temperature sensed inside the interior region reaches a second temperature, wherein the first temperature is greater than the second temperature. Other embodiments are described and claimed.

公开(公告)号：US11194372B2

公开(公告)日：2021-12-07

申请号：US16642161

申请日：2017-09-29

Applicant: INTEL CORPORATION

Inventor： Yanbing Sun ,  Xiaoguo Liang ,  Haifeng Gong ,  Ming Zhang

IPC: G06F1/00 ,  G06F1/20 ,  G06F3/06 ,  G11C7/04

Abstract: Provided are devices and methods relating to temperature control in a solid state drive (SSD). A SSD (10, 110, 210, 310, 410, 510, 610, 710) including a housing (12, 112, 212, 312, 412, 512, 612, 712) including a plurality of sides surrounding an interior region. The SSD (10, 110, 210, 310, 410, 510, 610, 710) includes at least one vent (14, 114, 214, 314, 414, 514, 614, 714) on the housing (12, 112, 212, 312, 412, 512, 612, 712), the at least one vent (14, 114, 214, 314, 414, 514, 614, 714) configured to be opened and closed in response to a signal. The SSD (10, 110, 210, 310, 410, 510, 610, 710) also includes a temperature sensor and a controller, the controller configured to send a signal to open the at least one vent (14, 114, 214, 314, 414, 514, 614, 714) when a temperature sensed inside the interior region reaches a first temperature, and the controller configured to close the at least one vent (14, 114, 214, 314, 414, 514, 614, 714) when a temperature sensed inside the interior region reaches a second temperature, wherein the first temperature is greater than the second temperature.