公开(公告)号：US09799610B2

公开(公告)日：2017-10-24

申请号：US14975360

申请日：2015-12-18

Applicant: INTEL CORPORATION

Inventor： Mingjie Xu ,  Suzana Prstic ,  Kedar Dhane

IPC: H01L23/04 ,  H01L23/00 ,  H01L23/16

CPC classification number: H01L23/562 ,  H01L23/16 ,  H01L2924/3511

Abstract: Creating surface variations on a stiffener in a stack reduces inter-stiffener sticking and stiffener stack tilt in pick and place media. The surface variations provide one or more airgaps that reduce inter-stiffener surface contact, provide space for contaminants and/or provide an averaged surface height due to surface roughness.

公开(公告)号：US10461003B2

公开(公告)日：2019-10-29

申请号：US15778387

申请日：2016-11-11

Applicant: Intel Corporation

Inventor： Omkar Karhade ,  Kedar Dhane

IPC: H01L23/04 ,  H01L23/16 ,  H01L23/00

Abstract: An electronic package that includes a substrate; a die attached to the substrate; an underfill positioned between the die and the substrate due to capillary action; a first support adjacent to the die and attached to the substrate; and a second support mounted on the first support, wherein the second support is closer to the die than the first support, wherein first support surrounds the die and the second support surrounds the die, and wherein the second support is a different material than the first support. The die may be flip chip bonded to the substrate and the underfill may secure the die to the substrate. The first support may be attached to the substrate using an adhesive and the second support may be attached to the first support using an adhesive.

公开(公告)号：US10157860B2

公开(公告)日：2018-12-18

申请号：US15392145

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Omkar G. Karhade ,  Kedar Dhane ,  Yongki Min ,  William J. Lambert

IPC: H01L21/00 ,  H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48

Abstract: Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a stiffener on a substrate, wherein a first section of the stiffener and a second section of the stiffener are on opposite sides of an opening. At least one component may be attached on the substrate within the opening, wherein the at least one component is disposed between the first section of the stiffener and the second section of the stiffener, and wherein the stiffener comprises a grounding structure disposed on the substrate.

公开(公告)号：US20180090411A1

公开(公告)日：2018-03-29

申请号：US15279222

申请日：2016-09-28

Applicant: Intel Corporation

Inventor： Edvin Cetegen ,  Omkar G. Karhade ,  Kedar Dhane ,  Chandra M. Jha

IPC: H01L23/367 ,  H01L23/373

CPC classification number: H01L23/3736 ,  H01L23/3733 ,  H01L23/42 ,  H01L23/4275 ,  H01L23/433

Abstract: A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired network attached to an inner surface of the heat spreader lid. An IC package may include a heat spreader lid placed over a first electronic component and a second electronic component. A first thermal interface may be formed between the first electronic component and the inner surface of the heat spreader lid, and a second thermal interface may be formed between the second electronic component and the inner surface of the heat spreader lid. The first thermal interface may include a wired network of a first TIM surrounded by a second TIM, while the second thermal interface may include the second TIM, without a wired network of the first TIM. Other embodiments may be described and/or claimed.

公开(公告)号：US20170179043A1

公开(公告)日：2017-06-22

申请号：US14975360

申请日：2015-12-18

Applicant: INTEL CORPORATION

Inventor： Mingjie Xu ,  Suzana Prstic ,  Kedar Dhane

IPC: H01L23/00 ,  H01L23/16

CPC classification number: H01L23/562 ,  H01L23/16 ,  H01L2924/3511

Abstract: Creating surface variations on a stiffener in a stack reduces inter-stiffener sticking and stiffener stack tilt in pick and place media. The surface variations provide one or more airgaps that reduce inter-stiffener surface contact, provide space for contaminants and/or provide an averaged surface height due to surface roughness.

公开(公告)号：US20180182718A1

公开(公告)日：2018-06-28

申请号：US15392145

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Omkar G. Karhade ,  Kedar Dhane ,  Yongki Min ,  William J. Lambert

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H05K1/18 ,  H05K1/11 ,  H05K3/30

CPC classification number: H01L23/562 ,  H01L21/4853 ,  H01L23/3142 ,  H01L23/49811 ,  H01L25/0655 ,  H01L2224/16225 ,  H05K1/0271 ,  H05K1/181

Abstract: Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a stiffener on a substrate, wherein a first section of the stiffener and a second section of the stiffener are on opposite sides of an opening. At least one component may be attached on the substrate within the opening, wherein the at least one component is disposed between the first section of the stiffener and the second section of the stiffener, and wherein the stiffener comprises a grounding structure disposed on the substrate.

公开(公告)号：US20170170087A1

公开(公告)日：2017-06-15

申请号：US14967993

申请日：2015-12-14

Applicant: Intel Corporation

Inventor： Omkar Karhade ,  Kedar Dhane

IPC: H01L23/16

CPC classification number: H01L23/16 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/3511 ,  H01L2924/3512

Abstract: An electronic package that includes a substrate; a die attached to the substrate; an underfill positioned between the die and the substrate due to capillary action; a first support adjacent to the die and attached to the substrate; and a second support mounted on the first support, wherein the second support is closer to the die than the first support, wherein first support surrounds the die and the second support surrounds the die, and wherein the second support is a different material than the first support. The die may be flip chip bonded to the substrate and the underfill may secure the die to the substrate. The first support may be attached to the substrate using an adhesive and the second support may be attached to the first support using an adhesive.

公开(公告)号：US11581240B2

公开(公告)日：2023-02-14

申请号：US16230021

申请日：2018-12-21

Applicant: INTEL CORPORATION

Inventor： Kedar Dhane ,  Omkar Karhade ,  Aravindha R. Antoniswamy ,  Divya Mani

IPC: H01L23/34 ,  H01L23/42 ,  H01L23/31 ,  H01L23/00

Abstract: An integrated circuit package that includes a liquid phase thermal interface material (TIM) is described. The package may include any number of die. The liquid phase TIM can be sealed in a chamber between a die and an integrated heat spreader and bounded on the sides by a perimeter layer. The liquid phase TIM can be fixed in place or circulated, depending on application. A thermal conductivity of the liquid phase TIM can be at least 15 Watts/meter-Kelvin, according to some embodiments. A liquid phase TIM eliminates failure mechanisms present in solid phase TIMs, such as cracking due to warpage and uncontained flow out of the module.

公开(公告)号：US10290561B2

公开(公告)日：2019-05-14

申请号：US15279222

申请日：2016-09-28

Applicant: Intel Corporation

Inventor： Edvin Cetegen ,  Omkar G. Karhade ,  Kedar Dhane ,  Chandra M. Jha

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/42 ,  H01L23/427 ,  H01L23/433

Abstract: A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired network attached to an inner surface of the heat spreader lid. An IC package may include a heat spreader lid placed over a first electronic component and a second electronic component. A first thermal interface may be formed between the first electronic component and the inner surface of the heat spreader lid, and a second thermal interface may be formed between the second electronic component and the inner surface of the heat spreader lid. The first thermal interface may include a wired network of a first TIM surrounded by a second TIM, while the second thermal interface may include the second TIM, without a wired network of the first TIM. Other embodiments may be described and/or claimed.

公开(公告)号：US20180358274A1

公开(公告)日：2018-12-13

申请号：US15778387

申请日：2016-11-11

Applicant: Intel Corporation

Inventor： Omkar Karhade ,  Kedar Dhane

IPC: H01L23/16

Abstract: An electronic package that includes a substrate; a die attached to the substrate; an underfill positioned between the die and the substrate due to capillary action; a first support adjacent to the die and attached to the substrate; and a second support mounted on the first support, wherein the second support is closer to the die than the first support, wherein first support surrounds the die and the second support surrounds the die, and wherein the second support is a different material than the first support. The die may be flip chip bonded to the substrate and the underfill may secure the die to the substrate. The first support may be attached to the substrate using an adhesive and the second support may be attached to the first support using an adhesive.