公开(公告)号：US08994344B2

公开(公告)日：2015-03-31

申请号：US13727227

申请日：2012-12-26

Applicant: Intel Corporation

Inventor： Gerhard Schrom ,  Peter Hazucha ,  Jaeseo Lee ,  Tanay Karnik ,  Vivek K. De ,  Fabrice Paillet

IPC: G05F1/46 ,  H02M1/14 ,  H02M7/06

CPC classification number: G05F1/468 ,  H02M1/14 ,  H02M7/068

Abstract: A multiphase DC-DC converter is provided that includes a multiphase transformer, the multiphase transformer including a plurality of input voltage terminals and an transformer output voltage terminal, each input voltage terminal associated with a corresponding phase. Each phase is assigned to an input voltage terminal of the plurality of input voltage terminals to minimize a ripple current at the input voltage terminals of the multiphase transformer.

公开(公告)号：US20160170456A9

公开(公告)日：2016-06-16

申请号：US13626357

申请日：2012-09-25

Applicant: INTEL CORPORATION

Inventor： Siva G. Narendra ,  James W. Tschanz ,  Howard A. Wilson ,  Donald S. Gardner ,  Peter Hazucha ,  Gerhard Schrom ,  Tanay Karnik ,  Nitin Borkar ,  Vivek K. De ,  Shekhar Y. Borkar

IPC: G06F1/26 ,  G06F1/32 ,  H01L25/065

CPC classification number: G06F1/26 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3296 ,  H01L23/34 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06589 ,  Y02D10/126 ,  Y02D10/172

Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.

Abstract translation: 公开了一种集成电路（IC）封装。 IC封装包括第一裸片; 以及以三维封装布局结合到CPU管芯的第二管芯。