Vector load with instruction-specified byte count less than a vector size for big and little endian processing

    公开(公告)号:US10691453B2

    公开(公告)日:2020-06-23

    申请号:US14941166

    申请日:2015-11-13

    Abstract: A method is disclosed for loading a vector with a processor. The method includes obtaining, by the processor, a variable-length vector load instruction. The method also includes determining that the vector load instruction specifies a vector register for a target, a memory address, and a length, wherein the memory address and the length are each specified in at least a general purpose register. The method also includes determining whether data should be loaded into the vector register using big endian byte-ordering or little endian byte-ordering. The method further includes loading data from memory into the vector register, wherein if the length is less than a length of the vector register, setting one or more residue bytes in the vector register to a pad value, wherein the residue bytes are determined based on the determined byte-ordering.

    Non-faulting compute instructions

    公开(公告)号:US10318289B2

    公开(公告)日:2019-06-11

    申请号:US14941562

    申请日:2015-11-14

    Abstract: A compute instruction to be executed is to use a memory operand in a computation. An address associated with the memory operand is to be used to locate a portion of memory from which data is to be obtained and placed in the memory operand. A determination is made as to whether the portion of memory extends across a specified memory boundary. Based on the portion of memory extending across the specified memory boundary, the portion of memory includes a plurality of memory units and a check is made as to whether at least one specified memory unit is accessible and whether at least one specified memory unit is inaccessible. Based on the checking indicating the at least one specified memory unit is accessible and the at least one specified memory unit is inaccessible accessing the at least one specified memory unit that is accessible and placing data from the at least one specified memory unit that is accessible in one or more locations in the memory operand, and for the at least one unit of memory that is inaccessible, placing default data in one or more other locations of the memory operand.

    CONVERSION OF BOOLEAN CONDITIONS
    9.
    发明申请
    CONVERSION OF BOOLEAN CONDITIONS 审中-公开
    BOOLEAN条件转换

    公开(公告)号:US20160378474A1

    公开(公告)日:2016-12-29

    申请号:US14871699

    申请日:2015-09-30

    CPC classification number: G06F9/30025 G06F9/30021 G06F9/30094

    Abstract: A Set Boolean machine instruction is provided that has associated therewith a result location to be used for a set Boolean operation and a mask. The mask is configured to test a plurality of types of conditions, including simple conditions and composite conditions. The machine instruction is executed, and the executing includes performing a first logical operation between the mask and contents of a selected field to obtain an output. The mask indicates a condition to be tested, and the condition is one type of condition of the plurality of types of conditions. The executing further includes performing a second logical operation on the output to obtain a first value represented as one data type, and placing a result in the result location based on the first value. The result including a second a value of another data type, the other data type being different from the one data type.

    Abstract translation: 提供了一种布尔机器指令,其与其相关联地将用于设置布尔运算和掩码的结果位置。 掩模被配置为测试多种类型的条件,包括简单条件和复合条件。 执行机器指令,并且执行包括执行掩模和所选字段的内容之间的第一逻辑运算以获得输出。 掩模表示要测试的条件,条件是多种类型的条件的一种条件。 执行还包括对输出执行第二逻辑运算以获得表示为一种数据类型的第一值,并且基于第一值将结果放置在结果位置中。 结果包括另一数据类型的第二个值,另一数据类型与一种数据类型不同。

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