公开(公告)号：US11080222B2

公开(公告)日：2021-08-03

申请号：US15862030

申请日：2018-01-04

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark J. Jeanson ,  Mark O. Maxson

IPC: H04L29/00 ,  G06F13/40 ,  G09C1/00 ,  H04L9/00 ,  H04B10/80

Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

公开(公告)号：US10548216B2

公开(公告)日：2020-01-28

申请号：US15465453

申请日：2017-03-21

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark J. Jeanson

IPC: G06F21/86 ,  H05K1/02

Abstract: In some embodiments, a tamper-respondent system includes a PCB having a coating on a surface thereof, wherein the coating includes spinel-based, non-conductive metal oxide mixed into a non-conductive supporting material. The tamper-respondent system also includes a conductive track writing unit, a sensor, and an enclosure substantially enclosing the PCB, conductive track writing unit, and sensor. Responsive to a determination that a signal output from the sensor is indicative of tampering, the conductive track writing unit writes a conductive track within a predetermined portion of the coating by irradiating the predetermined portion of the coating to reduce the spinel-based, non-conductive metal oxide in the predetermined portion of the coating to metal nuclei. In some embodiments, the conductive track may modify circuit paths of the PCB and/or create electrical features on the PCB detectable by monitoring agents.

公开(公告)号：US20190254176A1

公开(公告)日：2019-08-15

申请号：US16391509

申请日：2019-04-23

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark J. Jeanson

IPC: H05K3/40 ,  H05K3/32 ,  H05K3/12 ,  H05K3/42 ,  H05K1/11

CPC classification number: H05K3/4046 ,  H05K1/113 ,  H05K3/1266 ,  H05K3/323 ,  H05K3/425 ,  H05K3/429 ,  H05K2201/083 ,  H05K2203/0713 ,  H05K2203/104

Abstract: A method and apparatus for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.

公开(公告)号：US10224410B2

公开(公告)日：2019-03-05

申请号：US15805210

申请日：2017-11-07

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  David P. Paulsen ,  John E. Sheets, II

IPC: H01L29/66 ,  H01L29/73 ,  H01L29/08 ,  H01L23/00 ,  H01L29/732

Abstract: Embodiments herein describe a through-substrate via formed in a semiconductor substrate that includes a transistor. In one embodiment, the through-substrate via includes a BJT which includes different doped semiconductor layers that form a collector, a base, and an emitter. The through-substrate via can also include metal contacts to the collector, base, and emitter which enable the through-substrate via to be coupled to a metal routing layer or a solder bump.

公开(公告)号：US09965438B2

公开(公告)日：2018-05-08

申请号：US14968166

申请日：2015-12-14

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark J. Jeanson ,  Mark O. Maxson

IPC: G06F13/00 ,  G06F13/42 ,  G06F13/40

CPC classification number: G06F13/4291 ,  G06F11/1428 ,  G06F13/4018 ,  G06F13/4068 ,  G06F13/4282

Abstract: A lane within a processor bus that communicatively connects a transmitter and a receiver is dynamically assigned as a clock lane. The clock lane subsequently transmits a reference clock signal to coordinate data communications from the transmitter to the receiver. The clock lane may be assigned by determining signal margins of various lanes of the processor bus. The signal margins are determined by the transmitter sending a test pattern upon the various lanes and analyzing the received test pattern at the receiver. A dynamically assigned clock lane results increased overall signal integrity of communications between the transmitter and receiver. Further, a dynamically assigned clock lane may result in different lanes being assigned as the clock lane at distinct boot up instances, adding to the complexity of the unauthorized user determining the operational logic of the transmitter.

公开(公告)号：US09887847B2

公开(公告)日：2018-02-06

申请号：US15014672

申请日：2016-02-03

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark J. Jeanson ,  Mark O. Maxson

IPC: G06F21/00 ,  H04L9/32 ,  G06F13/42 ,  G06F13/40

CPC classification number: H04L9/3263 ,  G06F13/4068 ,  G06F13/409 ,  G06F13/4282 ,  G09C1/00 ,  H04L9/3234

Abstract: A conductor on glass security layer may be located within a printed circuit board (PCB) of a crypto adapter card or within a daughter card upon the crypto adapter card. The conductor on glass security layer includes a glass dielectric layer that remains intact in the absence of point force loading and shatters when a point load punctures or otherwise contacts the glass dielectric layer. The conductor on glass security layer also includes a conductive security trace upon the glass dielectric layer. A physical access attempt shatters a majority of the glass dielectric layer, which in turn fractures the security trace. A monitoring circuit that monitors the resistance of the conductive security trace detects the resultant open circuit or change in security trace resistance and initiates a tamper signal that which may be received by one or more computer system devices to respond to the unauthorized attempt of physical access.

公开(公告)号：US09887840B2

公开(公告)日：2018-02-06

申请号：US14869375

申请日：2015-09-29

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark O. Maxson

IPC: H04L9/08 ,  G06F13/42 ,  G06F1/12

CPC classification number: H04L9/0869 ,  G06F1/12 ,  G06F13/4221 ,  G09C1/00 ,  H04L9/065 ,  H04L9/0662 ,  H04L2209/34

Abstract: A bus communicates bits in parallel between a transmitter and receiver. A selected set of bits has its bits scrambled. Scrambling the bits includes assigning two or more bits of the selected set of bits to atypical lanes of the bus. By scrambling the bits, the order in which the bits of the selected set of bits are ready by a processer are obscured. The set of bits is transmitted to the receiver with one or more delays. The delays are on one or more of the lanes of the bus. The delays indicate the order of the bits. The receiver is configured to use the delays to identify the order of the bits and unscramble the set of bits.

公开(公告)号：US20170279532A1

公开(公告)日：2017-09-28

申请号：US15080120

申请日：2016-03-24

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark J. Jeanson ,  Mark O. Maxson

IPC: H04B10/2587 ,  G06F13/40 ,  H04L9/08

CPC classification number: G06F13/4068 ,  G09C1/00 ,  H04B10/80 ,  H04L9/004

Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.

公开(公告)号：US20170244756A1

公开(公告)日：2017-08-24

申请号：US15048024

申请日：2016-02-19

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Joseph Kuczynski ,  Timothy J. Tofil

IPC: H04L29/06 ,  G06F13/40

CPC classification number: H04L63/162 ,  G06F13/4068

Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB) that carries out cryptographic data handling functions. The security matrix layer includes at least two microcapsules each containing one or more reactants. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material contacts and shorts the first and second conductive shorting layers. A monitoring device that monitors whether the first and second conductive shorting layers have shorted detects the short and passes a tamper signal that is received by one or more computer system devices to respond to the unauthorized physical access attempt.

公开(公告)号：US20160357995A1

公开(公告)日：2016-12-08

申请号：US15086488

申请日：2016-03-31

Applicant: International Business Machines Corporation

Inventor： Gerald K. Bartley ,  Darryl J. Becker ,  Matthew S. Doyle ,  Mark O. Maxson

IPC: G06F21/88 ,  G06F21/62

CPC classification number: G06F21/70 ,  G06F21/6218 ,  G06F21/88 ,  G06F2221/2111

Abstract: Aspects of the present disclosure are directed towards a method of electronic verification of motion data. This includes collecting a first set of motion data that corresponds to a first set of motion characteristics generated from physically moving a hardware element of a computer ending upon inserting the hardware element of the computer into a computer chassis. This can further include determining an approved set of motion data and comparing the first set of motion data to the approved set of motion data. This can further include determining a difference between the first set of motion data and the approved set of motion data. This can further include determining that the difference does not satisfy a threshold. This can further include executing a reaction sequence in the computer, in response to determining that the difference does not satisfy the threshold.

Abstract translation: 本公开的方面针对运动数据的电子验证方法。 这包括收集第一组运动数据，该第一组运动数据对应于从将计算机的硬件元件插入计算机机箱中结束的物理移动计算机的硬件元件而产生的第一组运动特征。 这可以进一步包括确定一组经批准的运动数据，并将第一组运动数据与经批准的一组运动数据进行比较。 这可以进一步包括确定第一组运动数据与经批准的一组运动数据之间的差异。 这可以进一步包括确定差异不满足阈值。 这可以进一步包括响应于确定差异不满足阈值而在计算机中执行反应序列。