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公开(公告)号：US20220139858A1
公开(公告)日：2022-05-05
申请号：US17089199
申请日：2020-11-04
发明人： Joseph F. Maniscalco , Kenneth Chun Kuen Cheng , Koichi Motoyama , Oscar van der Straten , Alexander Reznicek
IPC分类号： H01L23/00
摘要： A pillar bump structure, and a method for forming the same includes forming, on a semiconductor substrate, a blanket liner followed by a seed layer including a noble metal. A first photoresist layer is formed directly above the seed layer followed by the formation of a first plurality of openings within the photoresist layer. A first conductive material is deposited within each of the first plurality of openings to form first pillar bumps. The first photoresist layer is removed from the semiconductor structure followed by removal of portions of the seed layer extending outward from the first pillar bumps, a portion of the seed layer remains underneath the first pillar bumps.
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公开(公告)号：US20210242082A1
公开(公告)日：2021-08-05
申请号：US16781038
申请日：2020-02-04
发明人： Joseph F. Maniscalco , Koichi Motoyama , Oscar van der Straten , Scott A. DeVries , Alexander Reznicek
IPC分类号： H01L21/768 , H01L23/532
摘要： An interconnect structure, and a method for forming the same includes forming recess within a dielectric layer and conformally depositing a barrier layer within the recess. A cobalt-infused ruthenium liner is formed above the barrier layer, the cobalt containing ruthenium liner formed by stacking a second liner above a first liner, the first liner positioned above the barrier layer. The first liner includes ruthenium while the second liner includes cobalt. Cobalt atoms migrate from the second liner to the first liner forming the cobalt-infused ruthenium liner. A conductive material is deposited above the cobalt-infused ruthenium liner to fill the recess followed by a capping layer made of cobalt.
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公开(公告)号：US11069566B2
公开(公告)日：2021-07-20
申请号：US16157897
申请日：2018-10-11
IPC分类号： H01L23/52 , H01L23/528 , H01L23/532 , H01L23/48 , H01L21/768 , H01L21/285
摘要： Devices and methods that can facilitate hybrid sidewall barrier and low resistance interconnect components are provided. According to an embodiment, a device can comprise a first interconnect material layer that can have a first opening that can comprise a first discontinuous barrier liner coupled to first sidewalls of the first opening and a first continuous barrier layer coupled to the first discontinuous barrier liner and the first sidewalls. The device can further comprise a second interconnect material layer coupled to the first interconnect material layer, the second interconnect material layer can have a second opening that can comprise a second discontinuous barrier liner coupled to second sidewalls of the second opening, a second continuous barrier layer coupled to the second discontinuous barrier liner and the second sidewalls.
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公开(公告)号：US10529622B1
公开(公告)日：2020-01-07
申请号：US16031059
申请日：2018-07-10
IPC分类号： H01L21/768 , H01L21/311 , H01L21/321 , H01L23/522 , H01L21/3105 , H01L23/532 , C25D5/02
摘要： Methods are provided for fabricating void-free metallic interconnect structures with self-formed diffusion barrier layers. A seed layer is deposited to line an etched opening in a dielectric layer. A metallic capping layer is selectively deposited on upper portions and upper sidewall surfaces of the seed layer which define an aperture into the etched opening. An electroplating process is performed to plate metallic material on exposed surfaces of the seed layer within the etched opening, which are not covered by the capping layer to form a metallic interconnect. The capping layer prohibits plating of metallic material on the capping layer and closing the aperture before the electroplating process is complete. A thermal anneal process is performed to cause the metallic material of the metallic capping layer to diffuse though the metallic interconnect and create a self-formed diffusion barrier layer between the metallic interconnect and the surfaces of the etched opening.
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公开(公告)号：US20190311985A1
公开(公告)日：2019-10-10
申请号：US15948809
申请日：2018-04-09
IPC分类号： H01L23/525 , H01L23/532 , H01L21/768
摘要： An interconnect structure is provided that includes a liner located between an electrically conductive structure and an interconnect dielectric material layer. The liner is composed of a phase change material that is insulating at a first temperature, and becomes conductive at a second temperature that is higher than the first temperature. The liner that is composed of such a phase change material is referred to as an “insulator-to/from metal transition (IMT)” liner. In the present application, an entirety of, or a portion of, the IMT liner may be changed from an insulating phase to a conductive phase by increasing the temperature (i.e., heating) of the liner so as to provide a redundancy path in which electrons can flow.
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6.发明公开公开(公告)号：US20230144157A1
公开(公告)日：2023-05-11
申请号：US17520672
申请日：2021-11-07
CPC分类号： H01L43/12 , H01L27/222 , H01L43/02
摘要： Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A first set of spacers are formed on the sidewalls of a bottom electrode. A reference layer is formed on the spacers and the bottom electrode. A second set of spacers are formed on the sidewalls of the first set of spacers and the reference layer. A tunnel barrier is formed on the reference layer and the second set of spacers. A free layer is formed on the tunnel barrier, where a width of the free layer is greater than a width of the reference layer. A metal hardmask is formed on the free layer. A third set of spacers are formed on the sidewalls of the metal hardmask, the free layer, the tunnel barrier, and the second set of spacers.
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公开(公告)号：US11158538B2
公开(公告)日：2021-10-26
申请号：US16781038
申请日：2020-02-04
发明人： Joseph F. Maniscalco , Koichi Motoyama , Oscar van der Straten , Scott A. DeVries , Alexander Reznicek
IPC分类号： H01L21/768 , H01L23/532
摘要： An interconnect structure, and a method for forming the same includes forming recess within a dielectric layer and conformally depositing a barrier layer within the recess. A cobalt-infused ruthenium liner is formed above the barrier layer, the cobalt containing ruthenium liner formed by stacking a second liner above a first liner, the first liner positioned above the barrier layer. The first liner includes ruthenium while the second liner includes cobalt. Cobalt atoms migrate from the second liner to the first liner forming the cobalt-infused ruthenium liner. A conductive material is deposited above the cobalt-infused ruthenium liner to fill the recess followed by a capping layer made of cobalt.
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公开(公告)号：US20210327803A1
公开(公告)日：2021-10-21
申请号：US16849342
申请日：2020-04-15
IPC分类号： H01L23/522 , H01L23/528 , H01L23/532 , H01L21/768
摘要： An interconnect structure of an integrated circuit (IC) in which dielectric material defines upper and lower cavities and a via cavity communicative with the upper and lower cavities at upper and lower ends thereof. The interconnect structure includes first conductive material filling the upper and lower cavities to form upper and lower lines, respectively and second conductive material filling the via cavity from the upper end thereof to the lower end thereof to form a via electrically communicative with the upper and lower lines.
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公开(公告)号：US20210098293A1
公开(公告)日：2021-04-01
申请号：US16589529
申请日：2019-10-01
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532 , H01L21/02
摘要： Integrated chips and methods of forming the same include forming a lower conductive line over an underlying layer. An upper conductive via is formed over the lower conducting lines. An encapsulating layer is formed on the lower conductive line and the upper conductive via using a treatment process that converts an outermost layer of the lower conductive line and the upper conductive via into the encapsulating layer.
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公开(公告)号：US20190371735A1
公开(公告)日：2019-12-05
申请号：US15994638
申请日：2018-05-31
IPC分类号： H01L23/532 , H01L21/768 , H01L21/3213
摘要： A method which exploits the benefits of a seed enhancement layer (in terms of void-free copper fill), while preventing copper volume loss during planarization, is provided. The method includes forming a partial seed enhancement liner in a lower portion of an opening that contains a recessed copper portion. Additional copper is formed in the upper portion of the opening providing a copper structure in which no copper volume loss at the uppermost interface of the copper structure is observed.
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