公开(公告)号：US20190228823A1

公开(公告)日：2019-07-25

申请号：US16367497

申请日：2019-03-28

申请人： International Business Machines Corporation

发明人： Tayfun Gokmen ,  Seyoung Kim ,  Hyung-Min Lee ,  Wooram Lee ,  Paul Michael Solomon

IPC分类号： G11C13/00 ,  G06N3/08 ,  G06N3/063 ,  G06N3/04 ,  G11C11/54 ,  G11C7/10

摘要： A processing unit, including a first circuit part, and a capacitor connected to the first circuit part. The capacitor is charged or discharged by the first circuit part.

公开(公告)号：US20220319588A1

公开(公告)日：2022-10-06

申请号：US17217767

申请日：2021-03-30

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： John Rozen ,  Seyoung Kim ,  Paul Michael Solomon

IPC分类号： G11C11/56 ,  G11C13/00 ,  H01L45/00

摘要： An embodiment of the invention may include a memory structure. The memory structure may include a first terminal connected to a first contact. The memory structure may include a second terminal connected to a second contact and a third contact. The memory structure may include a multi-level nonvolatile electrochemical cell having a variable resistance channel and a programming gate. The memory structure may include the first contact and second contact connected to the variable resistance channel. The memory structure may include the third contact is connected to the programming gate. This may enable decoupled read-write operations of the device.

公开(公告)号：US10950304B2

公开(公告)日：2021-03-16

申请号：US16367497

申请日：2019-03-28

申请人： International Business Machines Corporation

发明人： Tayfun Gokmen ,  Seyoung Kim ,  Hyung-Min Lee ,  Wooram Lee ,  Paul Michael Solomon

IPC分类号： G11C11/00 ,  G11C13/00 ,  G11C7/10 ,  G11C11/54 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08 ,  G06N3/02

摘要： A processing unit, including a first circuit part, and a capacitor connected to the first circuit part. The capacitor is charged or discharged by the first circuit part.

公开(公告)号：US20230195832A1

公开(公告)日：2023-06-22

申请号：US17555618

申请日：2021-12-20

申请人： International Business Machines Corporation

发明人： Tayfun Gokmen ,  Yasuteru Kohda ,  Effendi Leobandung ,  Kohji Hosokawa ,  Paul Michael Solomon

IPC分类号： G06F17/16 ,  G06E1/04 ,  G06N3/063 ,  G06N3/08 ,  G06N3/04

CPC分类号： G06F17/16 ,  G06E1/045 ,  G06N3/063 ,  G06N3/084 ,  G06N3/04

摘要： A system comprises a processor, and a resistive processing resistive processing unit coupled to the processor. The resistive processing unit comprises an array of cells, wherein the cells respectively comprise resistive memory devices, wherein at least a portion of the resistive memory devices are programmable to store weight values of a given matrix in the array of cells. The processor is configured to store the given matrix in the array of cells of the resistive processing unit, and perform a calibration process to generate a first set of calibration parameters for calibrating forward pass matrix-vector multiplication operations performed on the stored matrix in the array of cells of the resistive processing unit, and a second set of calibration parameters for calibrating backward pass matrix-vector multiplication operations performed on a transpose of the stored matrix in the array of cells of the resistive processing unit.

公开(公告)号：US20230178150A1

公开(公告)日：2023-06-08

申请号：US17545671

申请日：2021-12-08

申请人： International Business Machines Corporation

发明人： Geoffrey Burr ,  Masatoshi Ishii ,  Pritish Narayanan ,  Paul Michael Solomon

IPC分类号： G11C13/00 ,  G06F13/40 ,  G06F13/16

CPC分类号： G11C13/0061 ,  G11C13/0004 ,  G06F13/4022 ,  G06F13/1684

摘要： A computer-implemented method, according to one embodiment, includes: causing a first subset of pulse width modulators in a crossbar array of memory cells to apply respective pulses to the crossbar array together at a same start time and end the respective pulses according to a predetermined distribution of times correlated to stored pulse width data for each pulse width modulator. The method also includes causing a second subset of pulse width modulators in the crossbar array to apply pulses to the crossbar array according to the predetermined distribution of times correlated to stored pulse width data for each pulse width modulator and end the respective pulses together at a same end time.

公开(公告)号：US11568927B2

公开(公告)日：2023-01-31

申请号：US17217767

申请日：2021-03-30

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： John Rozen ,  Seyoung Kim ,  Paul Michael Solomon

IPC分类号： G11C13/00 ,  G11C11/56 ,  H01L45/00

摘要： An embodiment of the invention may include a memory structure. The memory structure may include a first terminal connected to a first contact. The memory structure may include a second terminal connected to a second contact and a third contact. The memory structure may include a multi-level nonvolatile electrochemical cell having a variable resistance channel and a programming gate. The memory structure may include the first contact and second contact connected to the variable resistance channel. The memory structure may include the third contact is connected to the programming gate. This may enable decoupled read-write operations of the device.

公开(公告)号：US20200050929A1

公开(公告)日：2020-02-13

申请号：US16100673

申请日：2018-08-10

申请人： International Business Machines Corporation

发明人： Effendi Leobandung ,  Zhibin Ren ,  SEYOUNG KIM ,  Paul Michael Solomon

IPC分类号： G06N3/063 ,  G06N3/04

摘要： Method, systems, crosspoint arrays, and systems for tuning a neural network. A crosspoint array includes: a set of conductive rows, a set of conductive columns intersecting the set of conductive rows to form a plurality of crosspoints, a circuit element coupled to each of the plurality of crosspoints configured to store a weight of the neural network, a voltage source associated with each conductive row, a first integrator attached at the end of at least one of the conductive column, and a first variable resistor attached to the integrator and the end of the at least one conductive column.

公开(公告)号：US11842770B2

公开(公告)日：2023-12-12

申请号：US17137615

申请日：2020-12-30

申请人： International Business Machines Corporation

发明人： Tayfun Gokmen ,  Seyoung Kim ,  Hyung-Min Lee ,  Wooram Lee ,  Paul Michael Solomon

IPC分类号： G11C16/04 ,  G11C13/00 ,  G11C7/10 ,  G11C11/54 ,  G06N3/049 ,  G06N3/084 ,  G06N3/088 ,  G06N3/065 ,  G06N3/02

CPC分类号： G11C13/004 ,  G06N3/02 ,  G06N3/049 ,  G06N3/065 ,  G06N3/084 ,  G06N3/088 ,  G11C7/1006 ,  G11C11/54 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0038 ,  G11C13/0069 ,  G11C2213/77

摘要： A processing unit, including a first circuit, and a first circuit element connected to the first circuit. The first circuit element is at least charged by the first circuit.

公开(公告)号：US11823740B2

公开(公告)日：2023-11-21

申请号：US17545671

申请日：2021-12-08

申请人： International Business Machines Corporation

发明人： Geoffrey Burr ,  Masatoshi Ishii ,  Pritish Narayanan ,  Paul Michael Solomon

IPC分类号： G11C13/00 ,  G06F13/16 ,  G06F13/40

CPC分类号： G11C13/0061 ,  G06F13/1684 ,  G06F13/4022 ,  G11C13/0004

摘要： A computer-implemented method, according to one embodiment, includes: causing a first subset of pulse width modulators in a crossbar array of memory cells to apply respective pulses to the crossbar array together at a same start time and end the respective pulses according to a predetermined distribution of times correlated to stored pulse width data for each pulse width modulator. The method also includes causing a second subset of pulse width modulators in the crossbar array to apply pulses to the crossbar array according to the predetermined distribution of times correlated to stored pulse width data for each pulse width modulator and end the respective pulses together at a same end time.

公开(公告)号：US20210151102A1

公开(公告)日：2021-05-20

申请号：US17137615

申请日：2020-12-30

申请人： International Business Machines Corporation

发明人： Tayfun Gokmen ,  Seyoung Kim ,  Hyung-Min Lee ,  Wooram Lee ,  Paul Michael Solomon

IPC分类号： G11C13/00 ,  G11C7/10 ,  G11C11/54 ,  G06N3/04 ,  G06N3/063 ,  G06N3/08 ,  G06N3/02

摘要： A processing unit, including a first circuit, and a first circuit element connected to the first circuit. The first circuit element is at least charged by the first circuit.