Actuator layer patterning with topography

    公开(公告)号:US10906802B2

    公开(公告)日:2021-02-02

    申请号:US16440816

    申请日:2019-06-13

    Abstract: Provided herein is a method including fusion bonding a handle wafer to a first side of a device wafer. Standoffs are formed on a second side of the device wafer. A first hardmask is deposited on the second side. A second hardmask is deposited on the first hardmask. A surface of the second hardmask is planarized. A photoresist is deposited on the second hardmask, wherein the photoresist includes a MEMS device pattern. The MEMS device pattern is etched into the second hardmask. The MEMS device pattern is etched into the first hardmask, wherein the etching stops before reaching the device wafer. The photoresist and the second hardmask are removed. The MEMS device pattern is further etched into the first hardmask, wherein the further etching reaches the device wafer. The MEMS device pattern is etched into the device wafer. The first hardmask is removed.

    Reduced MEMS cavity gap
    3.
    发明授权

    公开(公告)号:US11220423B2

    公开(公告)日:2022-01-11

    申请号:US16408239

    申请日:2019-05-09

    Abstract: Provided herein is a method including forming a MEMS cap. A cavity is formed in the MEMS cap wafer, and a bond material is deposited on the MEMS cap wafer, wherein the bond material lines the cavity after the depositing. The MEMS cap wafer is bonded to a MEMS device wafer, wherein the bond material forms a bond between the MEMS cap wafer and the MEMS device wafer. A MEMS device is formed in the MEMS device wafer. The bond material is removed from the cavity.

    3D stack configuration for 6-axis motion sensor

    公开(公告)号:US10941033B2

    公开(公告)日:2021-03-09

    申请号:US16540907

    申请日:2019-08-14

    Abstract: A method includes fusion bonding a first side of a MEMS wafer to a second side of a first handle wafer. A TSV is formed from a first side of the first handle wafer to the second side of the first handle wafer and into the first MEMS wafer. A dielectric layer is formed on the first side of the first handle wafer. A tungsten via is formed in the dielectric layer. Electrodes are formed on the dielectric layer. A second MEMS wafer is eutecticly bonded with a first eutectic bond to the electrodes, wherein the TSV electrically connects the first MEMS wafer to the second MEMS wafer. Standoffs are formed on a second side of the first MEMS wafer. A CMOS wafer is eutecticly bonded with a second eutectic bond to the standoffs, wherein the second eutectic bond includes different materials than the first eutectic bond.

    MEMS DEVICE WITH REDUCED ELECTRIC CHARGE, CAVITY VOLUME AND STICTION

    公开(公告)号:US20210070608A1

    公开(公告)日:2021-03-11

    申请号:US16660655

    申请日:2019-10-22

    Inventor: Dongyang Kang

    Abstract: A method includes forming a first mask on a first portion of a first surface of a substrate, forming a second mask on the first mask and further forming the second mask on a second portion of the first surface of the substrate, and etching an exposed portion of the first surface of the substrate and removing the second mask. According to some embodiments, an exposed portion of the first surface of the substrate is etched and the first mask is removed. An oxide layer is formed on the first surface of the substrate. A third mask is formed on the oxide layer except for a portion of the oxide layer corresponding to bumpstop features. The portion of the oxide layer corresponding to the bumpstop features is removed. An exposed portion of the first surface of the substrate is etched and the third mask is removed.

    MEMS device with reduced electric charge, cavity volume and stiction

    公开(公告)号:US10988372B2

    公开(公告)日:2021-04-27

    申请号:US16660655

    申请日:2019-10-22

    Inventor: Dongyang Kang

    Abstract: A method includes forming a first mask on a first portion of a first surface of a substrate, forming a second mask on the first mask and further forming the second mask on a second portion of the first surface of the substrate, and etching an exposed portion of the first surface of the substrate and removing the second mask. According to some embodiments, an exposed portion of the first surface of the substrate is etched and the first mask is removed. An oxide layer is formed on the first surface of the substrate. A third mask is formed on the oxide layer except for a portion of the oxide layer corresponding to bumpstop features. The portion of the oxide layer corresponding to the bumpstop features is removed. An exposed portion of the first surface of the substrate is etched and the third mask is removed.

    Actuator layer patterning with topography

    公开(公告)号:US10745270B2

    公开(公告)日:2020-08-18

    申请号:US16440860

    申请日:2019-06-13

    Abstract: Provided herein is a method including fusion bonding a handle wafer to a first side of a device wafer. A hardmask is deposited on a second side of the device wafer, wherein the second side is planar. The hardmask is etched to form a MEMS device pattern and a standoff pattern. Standoffs are formed on the device wafer, wherein the standoffs are defined by the standoff pattern. A eutectic bond metal is deposited on the standoffs, the device wafer, and the hardmask. A first photoresist is deposited and removed, such that the first photoresist covers the standoffs. The eutectic bond metal is etched using the first photoresist. The MEMS device pattern is etched into the device wafer. The first photoresist and the hardmask are removed.

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